linux-stable.git/drivers/gpu/drm/mediatek, branch v6.15

treewide: Switch/rename to timer_delete[_sync]()

2025-04-05T08:30:12+00:00

timer_delete[_sync]() replaces del_timer[_sync](). Convert the whole tree
over and remove the historical wrapper inlines.

Conversion was done with coccinelle plus manual fixups where necessary.

Signed-off-by: Thomas Gleixner 
Signed-off-by: Ingo Molnar

Merge tag 'mediatek-drm-next-6.15-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next

2025-03-14T04:28:56+00:00

Mediatek DRM Next for Linux 6.15

1. HDMI fixup and refinement
2. Move to devm_platform_ioremap_resource() usage
3. Add MT8188 dsc compatible
4. Fix config_updating flag never false when no mbox channel
5. dp: drm_err => dev_err in HPD path to avoid NULL ptr
6. Add dpi power-domains example
7. Add MT8365 SoC support
8. Fix error codes in mtk_dsi_host_transfer()

Signed-off-by: Dave Airlie 

From: Chun-Kuang Hu 
Link: https://patchwork.freedesktop.org/patch/msgid/20250312232909.9304-1-chunkuang.hu@kernel.org

drm/mediatek: dsi: fix error codes in mtk_dsi_host_transfer()

2025-03-12T23:17:22+00:00

There is a type bug because the return statement:

        return ret < 0 ? ret : recv_cnt;

The issue is that ret is an int, recv_cnt is a u32 and the function
returns ssize_t, which is a signed long.  The way that the type promotion
works is that the negative error codes are first cast to u32 and then
to signed long.  The error codes end up being positive instead of
negative and the callers treat them as success.

Fixes: 81cc7e51c4f1 ("drm/mediatek: Allow commands to be sent during video mode")
Reported-by: kernel test robot 
Closes: https://lore.kernel.org/r/202412210801.iADw0oIH-lkp@intel.com/
Signed-off-by: Dan Carpenter 
Reviewed-by: Mattijs Korpershoek 
Reviewed-by: AngeloGioacchino Del Regno 
Reviewed-by: CK Hu 
Link: https://patchwork.kernel.org/project/dri-devel/patch/b754a408-4f39-4e37-b52d-7706c132e27f@stanley.mountain/
Signed-off-by: Chun-Kuang Hu

drm/mediatek: add MT8365 SoC support

2025-03-12T23:17:22+00:00

Add DRM support for MT8365 SoC.

Signed-off-by: Fabien Parent 
Reviewed-by: AngeloGioacchino Del Regno 
Signed-off-by: Alexandre Mergnat 
Reviewed-by: CK Hu 
Link: https://patchwork.kernel.org/project/dri-devel/patch/20231023-display-support-v7-3-6703f3e26831@baylibre.com/
Signed-off-by: Chun-Kuang Hu

drm/mediatek: dp: drm_err => dev_err in HPD path to avoid NULL ptr

2025-03-12T23:17:22+00:00

The function mtk_dp_wait_hpd_asserted() may be called before the
`mtk_dp->drm_dev` pointer is assigned in mtk_dp_bridge_attach().
Specifically it can be called via this callpath:
 - mtk_edp_wait_hpd_asserted
 - [panel probe]
 - dp_aux_ep_probe

Using "drm" level prints anywhere in this callpath causes a NULL
pointer dereference. Change the error message directly in
mtk_dp_wait_hpd_asserted() to dev_err() to avoid this. Also change the
error messages in mtk_dp_parse_capabilities(), which is called by
mtk_dp_wait_hpd_asserted().

While touching these prints, also add the error code to them to make
future debugging easier.

Fixes: 7eacba9a083b ("drm/mediatek: dp: Add .wait_hpd_asserted() for AUX bus")
Signed-off-by: Douglas Anderson 
Reviewed-by: CK Hu 
Link: https://patchwork.kernel.org/project/dri-devel/patch/20250116094249.1.I29b0b621abb613ddc70ab4996426a3909e1aa75f@changeid/
Signed-off-by: Chun-Kuang Hu

drm/mediatek: Fix config_updating flag never false when no mbox channel

2025-03-12T23:17:10+00:00

When CONFIG_MTK_CMDQ is enabled, if the display is controlled by the CPU
while other hardware is controlled by the GCE, the display will encounter
a mbox request channel failure.
However, it will still enter the CONFIG_MTK_CMDQ statement, causing the
config_updating flag to never be set to false. As a result, no page flip
event is sent back to user space, and the screen does not update.

Fixes: da03801ad08f ("drm/mediatek: Move mtk_crtc_finish_page_flip() to ddp_cmdq_cb()")
Signed-off-by: Jason-JH Lin 
Reviewed-by: CK Hu 
Link: https://patchwork.kernel.org/project/dri-devel/patch/20250224051301.3538484-1-jason-jh.lin@mediatek.com/
Signed-off-by: Chun-Kuang Hu

drm/mediatek: Move to devm_platform_ioremap_resource() usage

2025-03-02T14:59:55+00:00

Replace platform_get_resource + devm_ioremap_resource
with just devm_platform_ioremap_resource()

Cc: Chun-Kuang Hu 
Cc: Philipp Zabel 
Reviewed-by: Maxime Ripard 
Reviewed-by: CK Hu 
Signed-off-by: Anusha Srivatsa 
Link: https://patchwork.kernel.org/project/dri-devel/patch/20250213-mem-cocci-v3-v1-4-93466d165349@redhat.com/
Signed-off-by: Chun-Kuang Hu

drm/mediatek: Add support for MT8195 Digital Parallel Interface

2025-03-02T14:11:09+00:00

Add support for the DPI block found in the MT8195 and MT8188 SoCs.
Inside of the SoC, this block is directly connected to the HDMI IP.

Reviewed-by: CK Hu 
Signed-off-by: AngeloGioacchino Del Regno 
Link: https://patchwork.kernel.org/project/dri-devel/patch/20250217154836.108895-11-angelogioacchino.delregno@collabora.com/
Signed-off-by: Chun-Kuang Hu

drm/mediatek: mtk_dpi: Explicitly manage TVD clock in power on/off

2025-03-02T14:00:55+00:00

In preparation for adding support for MT8195's HDMI reserved
DPI, add calls to clk_prepare_enable() / clk_disable_unprepare()
for the TVD clock: in this particular case, the aforementioned
clock is not (and cannot be) parented to neither pixel or engine
clocks hence it won't get enabled automatically by the clock
framework.

Please note that on all of the currently supported MediaTek
platforms, the TVD clock is always a parent of either pixel or
engine clocks, and this means that the common clock framework
is already enabling this clock before the children.
On such platforms, this commit will only increase the refcount
of the TVD clock without any functional change.

Reviewed-by: CK Hu 
Signed-off-by: AngeloGioacchino Del Regno 
Link: https://patchwork.kernel.org/project/dri-devel/patch/20250217154836.108895-10-angelogioacchino.delregno@collabora.com/
Signed-off-by: Chun-Kuang Hu

drm/mediatek: mtk_dpi: Support AFIFO 1T1P output and conversion

2025-03-02T13:58:26+00:00

On some SoCs, like MT8195 and MT8188, the DPI's FIFO controller
(afifo) supports outputting either one or two pixels per round
regardless of the input being 1T1P or 1T2P.

Add a `output_1pixel` member to struct mtk_dpi_conf which, if
set, will enable outputting one pixel per clock.

In case the input is two pixel per clock (1T2P), the AFIFO HW
will automatically (and internally) convert it to 1T1P.

Reviewed-by: CK Hu 
Signed-off-by: AngeloGioacchino Del Regno 
Link: https://patchwork.kernel.org/project/dri-devel/patch/20250217154836.108895-9-angelogioacchino.delregno@collabora.com/
Signed-off-by: Chun-Kuang Hu