linux-stable.git/drivers/gpu/drm/amd/pm/amdgpu_pm.c, branch linux-5.11.y

drm/amdgpu: Prevent shift wrapping in amdgpu_read_mask()

2021-03-04T11:14:21+00:00

[ Upstream commit c915ef890d5dc79f483e1ca3b3a5b5f1a170690c ]

If the user passes a "level" value which is higher than 31 then that
leads to shift wrapping.  The undefined behavior will lead to a
syzkaller stack dump.

Fixes: 5632708f4452 ("drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)")
Signed-off-by: Dan Carpenter 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amdgpu: add missing clock gating info in amdgpu_pm_info

2020-11-05T19:22:50+00:00

add missing clock gating informations in amdgpu_pm_info
1. AMD_CG_SUPPORT_VCN_MGCG
2. AMD_CG_SUPPORT_HDP_DS
3. AMD_CG_SUPPORT_HDP_SD
4. AMD_CG_SUPPORT_IH_CG
5. AMD_CG_SUPPORT_JPEG_MGCG

Signed-off-by: Kevin Wang 
Reviewed-by: Kenneth Feng 
Reviewed-by: Hawking Zhang 
Signed-off-by: Alex Deucher

drm/amdgpu: cleanup debug log in amdgpu_set_pp_features()

2020-11-04T22:09:58+00:00

Signed-off-by: Kevin Wang 
Reviewed-by: Kenneth Feng 
Signed-off-by: Alex Deucher

drm/amdgpu: Add GFX Fine Grain Clock Gating flag

2020-11-04T22:08:08+00:00

Add AMD_CG_SUPPORT_GFX_FGCG for FGCG

Signed-off-by: Jinzhou.Su 
Reviewed-by: Huang Rui 
Signed-off-by: Alex Deucher

drm/amd/pm: set the initial value of pm info to zero

2020-10-30T04:58:18+00:00

This patch is to set the initial value of pm info to zero.
The "value64" is ported to the hwmon and debugfs node, it is a uint64 type.
When it is used for NV10/VEGA10/VEGA20, its word size is appropriate,
because NV10/VEGA10/VEGA20 has a 64bit smu feature mask, which is separated to high 32bit and low 32bit.
But some asic has only 32bit smu feature mask,and this 32bit mask will fill the low 32bit of "value64".
So if this "value64" is not initialized to zero, the high 32bit will be
filled by a meaningless value, when the whole "value64" is ported to the
"SMC Feature Mask" in the "amdgpu_pm_info" on some specific asic, it
will be a wrong value.

Signed-off-by: Xiaojian Du 
Reviewed-by: Huang Rui 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amd/pm: populate Arcturus PCIE link state

2020-10-15T16:20:39+00:00

Populate current link speed, width and clock domain frequency.

Signed-off-by: Evan Quan 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amdgpu/swsmu: clean up a bunch of stale interfaces

2020-10-09T18:51:04+00:00

These were leftover from the initial implementation, but
never used.  Drop them.

Reviewed-by: Evan Quan 
Noticed-by: Ryan Taylor 
Signed-off-by: Alex Deucher

drm/amd/powerplay: add one sysfs file to support the feature to modify gfx clock on Raven/Raven2/Picasso APU.

2020-09-29T20:12:16+00:00

This patch is to add one sysfs file -- "pp_od_clk_voltage" for
Raven/Raven2/Picasso APU, which is only used by dGPU like VEGA10.
This sysfs file supports the feature to modify gfx engine clock(Mhz units), it can
be used to configure the min value and the max value for gfx clock limited in the
safe range.

Command guide:
echo "s level clock" > pp_od_clk_voltage
	s - adjust teh sclk level
	level - 0 or 1, "0" represents the min value, "1" represents the max value
	clock - the clock value(Mhz units), like 400, 800 or 1200, the value must be within the
                OD_RANGE limits.
Example:
$ cat pp_od_clk_voltage
OD_SCLK:
0:        200Mhz
1:       1400Mhz
OD_RANGE:
SCLK:     200MHz       1400MHz

$ echo "s 0 600" > pp_od_clk_voltage
$ echo "s 1 1000" > pp_od_clk_voltage
$ cat pp_od_clk_voltage
OD_SCLK:
0:        600Mhz
1:       1000Mhz
OD_RANGE:
SCLK:     200MHz       1400MHz

Signed-off-by: Xiaojian Du 
Reviewed-by: Kevin Wang 
Reviewed-by: Huang Rui 
Signed-off-by: Alex Deucher

drm/amdgpu: Get DRM dev from adev by inline-f

2020-08-24T17:06:06+00:00

Add a static inline adev_to_drm() to obtain
the DRM device pointer from an amdgpu_device pointer.

Signed-off-by: Luben Tuikov 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amdgpu: drm_device to amdgpu_device by inline-f (v2)

2020-08-24T17:06:06+00:00

Get the amdgpu_device from the DRM device by use
of an inline function, drm_to_adev(). The inline
function resolves a pointer to struct drm_device
to a pointer to struct amdgpu_device.

v2: Use a typed visible static inline function
    instead of an invisible macro.

Signed-off-by: Luben Tuikov 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher