linux-stable.git/drivers/gpu/drm/amd/include/kgd_pp_interface.h, branch linux-5.10.y

drm/amdgpu: Fix type of second parameter in odn_edit_dpm_table() callback

2023-01-14T09:16:16+00:00

[ Upstream commit e4d0ef752081e7aa6ffb7ccac11c499c732a2e05 ]

With clang's kernel control flow integrity (kCFI, CONFIG_CFI_CLANG),
indirect call targets are validated against the expected function
pointer prototype to make sure the call target is valid to help mitigate
ROP attacks. If they are not identical, there is a failure at run time,
which manifests as either a kernel panic or thread getting killed. A
proposed warning in clang aims to catch these at compile time, which
reveals:

  drivers/gpu/drm/amd/amdgpu/../pm/swsmu/amdgpu_smu.c:3008:29: error: incompatible function pointer types initializing 'int (*)(void *, uint32_t, long *, uint32_t)' (aka 'int (*)(void *, unsigned int, long *, unsigned int)') with an expression of type 'int (void *, enum PP_OD_DPM_TABLE_COMMAND, long *, uint32_t)' (aka 'int (void *, enum PP_OD_DPM_TABLE_COMMAND, long *, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
          .odn_edit_dpm_table      = smu_od_edit_dpm_table,
                                     ^~~~~~~~~~~~~~~~~~~~~
  1 error generated.

There are only two implementations of ->odn_edit_dpm_table() in 'struct
amd_pm_funcs': smu_od_edit_dpm_table() and pp_odn_edit_dpm_table(). One
has a second parameter type of 'enum PP_OD_DPM_TABLE_COMMAND' and the
other uses 'u32'. Ultimately, smu_od_edit_dpm_table() calls
->od_edit_dpm_table() from 'struct pptable_funcs' and
pp_odn_edit_dpm_table() calls ->odn_edit_dpm_table() from 'struct
pp_hwmgr_func', which both have a second parameter type of 'enum
PP_OD_DPM_TABLE_COMMAND'.

Update the type parameter in both the prototype in 'struct amd_pm_funcs'
and pp_odn_edit_dpm_table() to 'enum PP_OD_DPM_TABLE_COMMAND', which
cleans up the warning.

Link: https://github.com/ClangBuiltLinux/linux/issues/1750
Reported-by: Sami Tolvanen 
Reviewed-by: Kees Cook 
Signed-off-by: Nathan Chancellor 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amd/powerplay: add one sysfs file to support the feature to modify gfx clock on Raven/Raven2/Picasso APU.

2020-09-29T20:12:16+00:00

This patch is to add one sysfs file -- "pp_od_clk_voltage" for
Raven/Raven2/Picasso APU, which is only used by dGPU like VEGA10.
This sysfs file supports the feature to modify gfx engine clock(Mhz units), it can
be used to configure the min value and the max value for gfx clock limited in the
safe range.

Command guide:
echo "s level clock" > pp_od_clk_voltage
	s - adjust teh sclk level
	level - 0 or 1, "0" represents the min value, "1" represents the max value
	clock - the clock value(Mhz units), like 400, 800 or 1200, the value must be within the
                OD_RANGE limits.
Example:
$ cat pp_od_clk_voltage
OD_SCLK:
0:        200Mhz
1:       1400Mhz
OD_RANGE:
SCLK:     200MHz       1400MHz

$ echo "s 0 600" > pp_od_clk_voltage
$ echo "s 1 1000" > pp_od_clk_voltage
$ cat pp_od_clk_voltage
OD_SCLK:
0:        600Mhz
1:       1000Mhz
OD_RANGE:
SCLK:     200MHz       1400MHz

Signed-off-by: Xiaojian Du 
Reviewed-by: Kevin Wang 
Reviewed-by: Huang Rui 
Signed-off-by: Alex Deucher

drm/amd/powerplay: add new sysfs interface for retrieving gpu metrics(V2)

2020-08-06T19:43:56+00:00

A new interface for UMD to retrieve gpu metrics data.

V2: rich the documentation

Signed-off-by: Evan Quan 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amd/powerplay: define an universal data structure for gpu metrics (V4)

2020-08-06T19:43:37+00:00

Thus we can provide an interface for UMD to retrieve gpu metrics data.

V2: better naming and comments
V3: two structures created for dGPU and APU separately
V4: add driver attached timestamp

Signed-off-by: Evan Quan 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amd/powerplay: support xgmi pstate setting on powerplay routine V2

2019-11-06T21:27:46+00:00

Add xgmi pstate setting on powerplay routine.

V2: split the change of is_support_sw_smu_xgmi into a separate patch

Signed-off-by: Evan Quan 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amd/powerplay: enable df cstate control on powerplay routine

2019-10-15T19:48:09+00:00

Currently this is only supported on Vega20 with 40.50 and later
SMC firmware.

Signed-off-by: Evan Quan 
Reviewed-by: Kenneth Feng 
Signed-off-by: Alex Deucher

drm/amd/powerplay: Add interface to lock SMU HW I2C.

2019-08-27T13:17:42+00:00

v2:
PPSMC_MSG_RequestI2CBus seems not to work and so to avoid conflict
over I2C bus and engine disable thermal control access to
force SMU stop using the I2C bus until the issue is reslolved.

Expose and call vega20_is_smc_ram_running to skip locking when SMU
FW is not yet loaded.

v3:
Remove the prevoius hack as the SMU found the bug.

v5: Typo fix

Signed-off-by: Andrey Grodzovsky 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amd/poweplay: Add amd_pm_funcs callback for mode 2

2019-08-15T16:00:30+00:00

Add callback to call the new mode2 reset interface.

Signed-off-by: Andrey Grodzovsky 
Reviewed-by: Alex Deucher 
Reviewed-by: Evan Quan 
Signed-off-by: Alex Deucher

drm/amd/powerplay: add new sensor type for VCN powergate status

2019-07-31T04:48:34+00:00

VCN is widely used in new ASICs and different from tranditional
UVD and VCE.

Signed-off-by: Evan Quan 
Reviewed-by: Kenneth Feng 
Signed-off-by: Alex Deucher

drm/amdgpu/powerplay: add a new interface to set the mp1 state

2019-07-31T04:24:21+00:00

This is required for certain cases such as various GPU resets
(mode1, mode2), BACO, shutdown, unload, etc. to put the SMU into
the appropriate state for when the hw is re-initialized.

Reviewed-by: Evan Quan 
Signed-off-by: Alex Deucher