linux-stable.git/drivers/gpu/drm/amd/include/asic_reg, branch linux-5.5.y Linux kernel stable tree amdgpu/gmc_v9: save/restore sdpif regs during S3 2020-03-05T15:45:16+00:00 Shirish S shirish.s@amd.com 2020-01-27T11:05:24+00:00 2e109ead38a3d63e730b44e9e6ab5498542acc5d commit a3ed353cf8015ba84a0407a5dc3ffee038166ab0 upstream. fixes S3 issue with IOMMU + S/G enabled @ 64M VRAM. Suggested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
commit a3ed353cf8015ba84a0407a5dc3ffee038166ab0 upstream.

fixes S3 issue with IOMMU + S/G  enabled @ 64M VRAM.

Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drm/amdgpu: add VCN0 and VCN1 needed headers 2019-10-25T20:50:09+00:00 Jane Jian jane.jian@amd.com 2019-10-17T15:30:20+00:00 6aec5bb4892a2c4881261532e99eef86e5f1c734 Add mmsch part registers Signed-off-by: Jane Jian <jane.jian@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add mmsch part registers

Signed-off-by: Jane Jian <jane.jian@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add DP_DPHY_INTERNAL_CTR regs 2019-10-17T20:27:07+00:00 Bhawanpreet Lakha Bhawanpreet.Lakha@amd.com 2019-10-02T15:50:15+00:00 ce6095267d86fc907c523cc2e2549ec51f3615c2 Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add new SMU 7.1.3 registers for BACO 2019-10-15T19:55:31+00:00 Alex Deucher alexander.deucher@amd.com 2019-10-04T20:18:52+00:00 5d934ac0d04c94d960f9310a6e20ced07a964bc9 Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add new SMU 7.1.2 registers for BACO 2019-10-15T19:55:31+00:00 Alex Deucher alexander.deucher@amd.com 2019-10-04T20:16:43+00:00 9fc00ea774693a4a13ec88c4bff7e199f987bfa1 Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add new SMU 7.0.1 registers for BACO 2019-10-15T19:55:31+00:00 Alex Deucher alexander.deucher@amd.com 2019-10-04T20:14:18+00:00 c74c524e7c41e508c186173ec62ec8fc0a93165f Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add new BIF 5.0 register for BACO 2019-10-15T19:55:31+00:00 Alex Deucher alexander.deucher@amd.com 2019-02-11T17:28:45+00:00 c06a91c0f826ff5a812247ef71c9d432a9cd96b1 Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add new BIF 4.1 register for BACO 2019-10-15T19:55:31+00:00 Alex Deucher alexander.deucher@amd.com 2019-02-15T19:40:26+00:00 8763eb7ae9ff06793f10135a93651c79272a6099 Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/include: add register define for VML2 and ATCL2 2019-10-15T19:49:51+00:00 Dennis Li Dennis.Li@amd.com 2019-08-09T06:30:29+00:00 87d92e1f909ce366bd0a3426d5c5fb7bf92014c6 Add VML2 and ATCL2 ECC registers to support VEGA20 RAS Signed-off-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: Hawking Zhang <hawking.zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add VML2 and ATCL2 ECC registers to support VEGA20 RAS

Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/amdgpu: add IH cg support on soc15 project 2019-10-03T14:11:04+00:00 Kenneth Feng kenneth.feng@amd.com 2019-09-25T05:41:35+00:00 227f7d58d707fa6d931a1e16d29eb3e1c41ad67d enable/disable IH clock gating on soc15 projects. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
enable/disable IH clock gating on soc15 projects.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>