linux-stable.git/drivers/gpu/drm/amd/include/asic_reg/vcn, branch master Linux kernel stable tree drm/amdgpu: add VCN 5.3.0 headers 2026-01-05T21:59:57+00:00 Alex Deucher alexander.deucher@amd.com 2025-12-05T15:59:30+00:00 c2775aaa0ef666d5cec46850fdd18402071d0e16 Add headers for VCN 5.3.0. v2: Squash in updates (Alex) Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add headers for VCN 5.3.0.

v2: Squash in updates (Alex)

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add jpeg poison status reg 2025-05-22T16:02:49+00:00 Mangesh Gadre Mangesh.Gadre@amd.com 2025-05-14T05:17:02+00:00 8d74ce4e5524b39e991bfa025f1382e54c5f710a added registers to enable jpeg ras Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com> Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
added registers to enable jpeg ras

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add vcn poison status reg 2025-05-22T16:02:10+00:00 Mangesh Gadre Mangesh.Gadre@amd.com 2025-05-14T04:31:36+00:00 f55fcf15a9c585d0a3f294307f1499d3759459c6 added register to enable vcn ras Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com> Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
added register to enable vcn ras

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add vcn v5_0_0 ip headers 2025-05-13T13:31:51+00:00 fanhuang FangSheng.Huang@amd.com 2025-05-06T06:49:18+00:00 80f66ca7a45889d2a8eecf61c3069117b3279b3f Add vcn v5_0_0 register offset and shift masks header files Only include the registers required for MMSCH initialization Signed-off-by: fanhuang <FangSheng.Huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add vcn v5_0_0 register offset and shift masks
header files
Only include the registers required for MMSCH
initialization

Signed-off-by: fanhuang <FangSheng.Huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add JPEG4_0_3 core reset control reg 2025-02-19T20:16:04+00:00 Sathishkumar S sathishkumar.sundararaju@amd.com 2025-02-12T04:51:40+00:00 58702e1a093b76cd273ec25b0cd0218d235743cd Add core reset control registers for JPEG4_0_3 Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add core reset control registers for JPEG4_0_3

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add VCN v4.0.3 RRMT register offset 2025-02-13T02:02:55+00:00 Lijo Lazar lijo.lazar@amd.com 2025-01-10T07:28:49+00:00 822b13d19fac05b8299f9e3636dbcce246867d2f Add RRMT control register offset for VCN v4.0.3 Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add RRMT control register offset for VCN v4.0.3

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add vcn v5_0_0 ip headers (v5) 2024-02-12T21:10:05+00:00 Hawking Zhang Hawking.Zhang@amd.com 2023-12-19T11:14:55+00:00 5995a22f2e66bb385421a35078a2399c525756ba v1: Add vcn v5_0_0 register offset and shift masks header files. (Hawking) v2: Update vcn v5_0_0 register offset and shift masks header files to RE2. (Likun) v3: Update vcn v5_0_0 register offset and shift masks header files to RE2.5. (Likun) v4: Update vcn v5_0_0 register offset and shift masks header files to RE3. (Likun) v5: Clean up vcn v5_0_0 ip headers. (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
v1: Add vcn v5_0_0 register offset and shift masks
    header files. (Hawking)
v2: Update vcn v5_0_0 register offset and shift masks
    header files to RE2. (Likun)
v3: Update vcn v5_0_0 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Update vcn v5_0_0 register offset and shift masks
    header files to RE3. (Likun)
v5: Clean up vcn v5_0_0 ip headers. (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add UMSCH 4.0 register headers 2023-08-31T20:35:06+00:00 Lang Yu Lang.Yu@amd.com 2023-07-14T19:45:42+00:00 2c98de563b6fc093f585a236c82a80e9ca3b9ee0 Add headers for UMSCH 4.0. v2: updates (Alex) Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add headers for UMSCH 4.0.

v2: updates (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add vcn 4_0_5 header files 2023-08-31T20:34:25+00:00 Saleemkhan Jamadar saleemkhan.jamadar@amd.com 2023-07-14T19:47:32+00:00 c2066c5fb322dbf7c6a4a2815d9d5d2976eac589 Add VCN 4.0.5 registers v2 - Add license header (Alexander Deucher) v3 - updates (Alex) Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add VCN 4.0.5 registers

v2 - Add license header (Alexander Deucher)
v3 - updates (Alex)

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add vcn/jpeg ras err status registers 2023-06-09T13:58:12+00:00 Hawking Zhang Hawking.Zhang@amd.com 2023-03-01T02:05:17+00:00 6c2bebfca43c14967cfb9cf6c2c074b0d755ddd7 Add new ras error status registers introduced in vcn v4_0_3 to log vcn and jpeg ras error. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add new ras error status registers introduced in
vcn v4_0_3 to log vcn and jpeg ras error.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>