linux-stable.git/drivers/gpu/drm/amd/display, branch v6.6.7

drm/amd/display: Fix MPCC 1DLUT programming

2023-12-08T07:52:25+00:00

[ Upstream commit 6f395cebdd8927fbffdc3a55a14fcacf93634359 ]

[Why]
Wrong function is used to translate LUT values to HW format, leading to
visible artifacting in some cases.

[How]
Use the correct cm3_helper function.

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Krunoslav Kovac 
Acked-by: Hamza Mahfooz 
Signed-off-by: Ilya Bakoulin 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amd/display: Simplify brightness initialization

2023-12-08T07:52:25+00:00

[ Upstream commit d9e865826c202b262f9ee3f17a03cc4ac5d44ced ]

[Why]
Remove the brightness cache in DC. It uses a single value to represent
the brightness for both SDR and HDR mode. This leads to flash in HDR
on/off. It also unconditionally programs brightness as in HDR mode. This
may introduce garbage on SDR mode in miniLED panel.

[How]
Simplify the initialization flow by removing the DC cache and taking
what panel has as default. Expand the mechanism for PWM to DPCD Aux to
restore cached brightness value generally.

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Krunoslav Kovac 
Acked-by: Hamza Mahfooz 
Signed-off-by: Camille Cho 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amd/display: Reduce default backlight min from 5 nits to 1 nits

2023-12-08T07:52:25+00:00

[ Upstream commit 5edb7cdff85af8f8c5fda5b88310535ab823f663 ]

[Why & How]
Currently set_default_brightness_aux function uses 5 nits as lower limit
to check for valid default_backlight setting. However some newer panels
can support even lower default settings

Reviewed-by: Agustin Gutierrez 
Acked-by: Roman Li 
Signed-off-by: Swapnil Patel 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher 
Stable-dep-of: d9e865826c20 ("drm/amd/display: Simplify brightness initialization")
Signed-off-by: Sasha Levin

drm/amd/display: refactor ILR to make it work

2023-12-08T07:52:25+00:00

[ Upstream commit 6ec876472ff7edeaf2a07bf6afbff74d7f1dfa35 ]

[Why]
Current ILR toggle is on/off as a part of panel
config for new function, which breaks original
ILR logic

[How]
Refactor ILR and take panel config into account

Reviewed-by: Anthony Koo 
Acked-by: Aurabindo Pillai 
Signed-off-by: Sherry Wang 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher 
Stable-dep-of: d9e865826c20 ("drm/amd/display: Simplify brightness initialization")
Signed-off-by: Sasha Levin

drm/amd/display: Remove power sequencing check

2023-12-08T07:52:24+00:00

[ Upstream commit b0399e22ada096435de3e3e73899aa8bc026820d ]

[Why]
	Some ASICs keep backlight powered on after dpms off
	command has been issued.

[How]
	The check for no edp power sequencing was never going to pass.
	The value is never changed from what it is set by design.

Cc: stable@vger.kernel.org # 6.1+
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2765
Reviewed-by: Swapnil Patel 
Acked-by: Roman Li 
Signed-off-by: Agustin Gutierrez 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amd/display: Refactor edp power control

2023-12-08T07:52:24+00:00

[ Upstream commit 45f98fccb1f6895f527bd5f811f23478c2f920f5 ]

[Why & How]
To organize the edp power control a bit:

1. add flag in dc_link to indicate dc to skip all implicit eDP power control.
2. add edp_set_panel_power link service for DM to call.

Reviewed-by: Aric Cyr 
Reviewed-by: Jun Lei 
Acked-by: Wayne Lin 
Signed-off-by: Ian Chen 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher 
Stable-dep-of: b0399e22ada0 ("drm/amd/display: Remove power sequencing check")
Signed-off-by: Sasha Levin

drm/amd/display: force toggle rate wa for first link training for a retimer

2023-12-08T07:52:18+00:00

commit eb28018943fed7639dfea1c9ec9c756ec692b99a upstream.

[WHY]
Handover from DMUB to driver does not perform link rate toggle.
It might cause link training failure for boot up.

[HOW]
Force toggle rate wa for first link train.
link->vendor_specific_lttpr_link_rate_wa should be zero then.

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Michael Strauss 
Acked-by: Hamza Mahfooz 
Signed-off-by: Zhongwei 
Signed-off-by: Alex Deucher 
Signed-off-by: Greg Kroah-Hartman

drm/amd/display: fix ABM disablement

2023-12-08T07:52:18+00:00

commit b9f46f0b98784e40288ee393f863f553fde062fa upstream.

On recent versions of DMUB firmware, if we want to completely disable
ABM we have to pass ABM_LEVEL_IMMEDIATE_DISABLE as the requested ABM
level to DMUB. Otherwise, LCD eDP displays are unable to reach their
maximum brightness levels. So, to fix this whenever the user requests an
ABM level of 0 pass ABM_LEVEL_IMMEDIATE_DISABLE to DMUB instead. Also,
to keep the user's experience consistent map ABM_LEVEL_IMMEDIATE_DISABLE
to 0 when a user tries to read the requested ABM level.

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Harry Wentland 
Signed-off-by: Hamza Mahfooz 
Signed-off-by: Alex Deucher 
Signed-off-by: Greg Kroah-Hartman

drm/amd/display: Update min Z8 residency time to 2100 for DCN314

2023-12-08T07:52:18+00:00

commit 4636a211980052ca0df90265c8a3ed2d46099091 upstream.

[Why]
Some panels with residency period of 2054 exhibit flickering with
Z8 at the end of the frame.

[How]
As a workaround, increase the limit to block these panels.

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Syed Hassan 
Acked-by: Hamza Mahfooz 
Signed-off-by: Nicholas Kazlauskas 
Signed-off-by: Alex Deucher 
Signed-off-by: Greg Kroah-Hartman

drm/amd/display: Use DRAM speed from validation for dummy p-state

2023-12-08T07:52:17+00:00

commit 9be601135ba8ac69880c01606c82140f2dde105e upstream.

[Description]
When choosing which dummy p-state latency to use, we
need to use the DRAM speed from validation. The DRAMSpeed
DML variable can change because we use different input
params to DML when populating watermarks set B.

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Samson Tam 
Acked-by: Hamza Mahfooz 
Signed-off-by: Alvin Lee 
Signed-off-by: Alex Deucher 
Signed-off-by: Greg Kroah-Hartman