linux-stable.git/drivers/gpu/drm/amd/display/modules, branch master

drm/amd/display: Fix ABM over VABC

2026-08-06T16:43:32+00:00

[Why]
ABM does not take effect when brightness
is below twenty percent on VABC LCD panels.

[How]
Create new VESA aux path for brightness
translation functions. When VESA aux enabled
use zero-anchored linear interpolation to
translate instead of the legacy min max
backlight mapping.

Reviewed-by: Anthony Koo 
Signed-off-by: Iswara Nagulendran 
Signed-off-by: Roman Li 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Fix seamless mode switch not triggering for HDR to SDR transition

2026-08-06T13:58:41+00:00

[Why]
The seamless mode switch was not getting triggered during HDR to SDR
transitions, and no DPCD write was observed. Root cause analysis
revealed that incorrect panel capabilities were being reported for PSR
SU panels. Due to the wrong capabilities, the OS was not invoking the
seamless mode switch API, resulting in no DPCD communication and also
gated eDP teardown across the seamless mode switch hold.

[How]
Fixed by setting the correct power panel capabilities for PSR SU panels.
This ensures the OS receives accurate panel capability information and
triggers the seamless mode switch API as expected, restoring proper
DPCD writes during HDR to SDR transitions.
The DC commit sequence was tearing the eDP down anyway -- backlight off,
ABM disable, DPMS off, PSR/Replay enable state cleared, PHY TX off,
OTG/OPTC off; all these actions are blocked now with the
skip_implict_edp_power_control

Reviewed-by: Aric Cyr 
Signed-off-by: Karthi Kandasamy 
Signed-off-by: Roman Li 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Update VRR info packet to support 12-bit refresh rates

2026-08-06T13:58:25+00:00

[Why]
VRR info packet previously only supported up to 10-bit refresh rate values
limiting the range of FreeSync minimum and maximum refresh rates that
could be encoded.

[How]
Expanded the bit masking in PB11/PB12 from 2 to 4 bits to capture bits
11:8 of the minimum and maximum FreeSync refresh rates, enabling the VRR
info packet to encode 12-bit refresh rate values.

Reviewed-by: Anthony Koo 
Signed-off-by: Harry VanZyllDeJong 
Signed-off-by: Roman Li 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Revert Fix DMSS not triggering for HDR to SDR transition

2026-07-28T22:35:05+00:00

Reverting this commit as it causes a regression lighting up eDP panels:
This reverts commit 1f07e9fddc4a ("drm/amd/display: Fix DMSS not triggering
for HDR to SDR transition")

Fixes: 1f07e9fddc4a ("drm/amd/display: Fix DMSS not triggering for HDR to SDR transition")
Reviewed-by: Joshua Aberback 
Reviewed-by: Yihan Zhu 
Signed-off-by: Justin Chen 
Signed-off-by: Wayne Lin 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Remove redundant NULL check before kfree() in mod_power_create()

2026-07-15T13:15:43+00:00

kfree() safely handles NULL pointers, so there is no need to check for
NULL before calling kfree().

Remove redundant NULL check.

Found by Coccinelle ifnullfree script.

Signed-off-by: Ziran Zhang 
Reviewed-by: George Zhang 
Signed-off-by: Alex Deucher

drm/amd/display: Fix DMSS not triggering for HDR to SDR transition

2026-07-15T13:15:40+00:00

Why:
DMSS feature was not getting triggered during HDR to SDR transitions,
and no DPCD write was observed. Root cause analysis revealed that
incorrect panel capabilities were being reported for PSR SU panels.
Due to the wrong capabilities, the OS was not invoking the DMSS API,
resulting in no DPCD communication and also gate eDP teardown across
DMSS hold

How:
Fixed by setting the correct power panel capabilities for PSR SU panels.
This ensures the OS receives accurate panel capability information and
triggers the DMSS API as expected, restoring proper DPCD writes during
HDR to SDR transitions.
The DC commit sequence,was tearing the eDP down anyway -- backlight off, ABM disable,
DPMS off, PSR/Replay feature_enabled cleared, PHY TX off, OTG/OPTC off
all these actions are blocked now with the skip_implict_edp_power_control

Reviewed-by: Aric Cyr 
Signed-off-by: Karthi Kandasamy 
Signed-off-by: George Zhang 
Signed-off-by: Alex Deucher

drm/amd/display: Fix VABC Init and OLED Support

2026-07-15T13:15:39+00:00

[Why]
TCONs supporting VESA AUX Backlight does not always
support VESA Smooth Brightness. Driver software
needs to implement smooth brightness by periodically
updating the brightness by small steps. Driver
implementation is completed and verified on LCD
panels but solution is missing for OLED panels.

[How]
Updated driver to include smooth brightness for
OLED panels using VESA Aux Backlight.
Revert original workaround for VABC on oled issue,
as it is no longer needed.
Add VABC backlight Initialization sequence from
driver side.
Add fix to remove conflict between FW and driver
backlight programming for future ASIC.
Enable VABC for all future asic revisions.

Reviewed-by: Anthony Koo 
Reviewed-by: Dillon Varone 
Signed-off-by: Iswara Nagulendran 
Signed-off-by: George Zhang 
Signed-off-by: Alex Deucher

drm/amd/display: Enable CACP on Linux

2026-07-14T23:12:34+00:00

[Why]
Enable OLED panels to save more power on the Linux platform by
enabling CACP support on Linux.

[How]
Update abm_feature_support() to return ABM_CACP_SUPPORT for OLED
panels. Enable ABM property for all eDP panels including OLED to
support CACP via set_abm_level.

Reviewed-by: Sun peng (Leo) Li 
Signed-off-by: Chenyu Chen 
Signed-off-by: George Zhang 
Signed-off-by: Alex Deucher

drm/amd/display: guard against overflow in HDCP message dump

2026-07-01T15:35:35+00:00

[Why]
mod_hdcp_dump_binary_message() computed target_size (a uint32_t) as roughly
byte_size * msg_size and gated the whole write on buf_size >= target_size. A
large msg_size can overflow target_size, wrapping it to a small value that
passes the check while the loop still writes byte_size * msg_size bytes
into buf. All current callers pass small constants so this is not reachable
today, but the unchecked arithmetic should be hardened.

[How]
Drop the overflow-prone target_size precomputation and instead bounds-check the
output position on every iteration, stopping once the next entry would not leave
room for the trailing terminator. This cannot overflow and, for oversized
messages, dumps as much as fits rather than printing nothing.

Fixes: 4c283fdac08a ("drm/amd/display: Add HDCP module")
Assisted-by: Copilot:claude-opus-4.8
Reviewed-by: Alex Hung 
Signed-off-by: Harry Wentland 
Signed-off-by: George Zhang 
Signed-off-by: Alex Deucher

drm/amd/display: Replace repeated no-native-i2c checks with force_i2c_over_aux field

2026-07-01T15:31:10+00:00

[Why]
The compound condition checking dp_connector_no_native_i2c
and no_ddc_pin was duplicated across many files, obscuring
intent at every call site.

[How]
Add bool force_i2c_over_aux to struct dc_link, initialized
once during link creation. Add link_get_ddc_aux_inst()
helper to select the correct aux instance. Wire into
link_service via construct_link_service_ddc(). Replace all
duplicated condition checks and aux instance selection
blocks with the new field and helper. No functional change.

Reviewed-by: Nevenko Stupar 
Signed-off-by: Wenjing Liu 
Signed-off-by: George Zhang 
Signed-off-by: Alex Deucher