<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/gpu/drm/amd/display/modules, branch linux-6.2.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>drm/amd/display: fix a divided-by-zero error</title>
<updated>2023-05-11T14:10:53+00:00</updated>
<author>
<name>Alex Hung</name>
<email>alex.hung@amd.com</email>
</author>
<published>2023-04-03T09:45:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=19e0433d0d1f59d50a9d17b15ee638cdc55d26d0'/>
<id>19e0433d0d1f59d50a9d17b15ee638cdc55d26d0</id>
<content type='text'>
[ Upstream commit 0b5dfe12755f87ec014bb4cc1930485026167430 ]

[Why &amp; How]

timing.dsc_cfg.num_slices_v can be zero and it is necessary to check
before using it.

This fixes the error "divide error: 0000 [#1] PREEMPT SMP NOPTI".

Reviewed-by: Aurabindo Pillai &lt;Aurabindo.Pillai@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 0b5dfe12755f87ec014bb4cc1930485026167430 ]

[Why &amp; How]

timing.dsc_cfg.num_slices_v can be zero and it is necessary to check
before using it.

This fixes the error "divide error: 0000 [#1] PREEMPT SMP NOPTI".

Reviewed-by: Aurabindo Pillai &lt;Aurabindo.Pillai@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: fix PSR-SU/DSC interoperability support</title>
<updated>2023-05-11T14:10:53+00:00</updated>
<author>
<name>Hamza Mahfooz</name>
<email>hamza.mahfooz@amd.com</email>
</author>
<published>2023-01-05T15:54:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c2ec0f4de330ec4eef07626e479ec86b03e71118'/>
<id>c2ec0f4de330ec4eef07626e479ec86b03e71118</id>
<content type='text'>
[ Upstream commit 13b90cf900ab69dd5cab3cc5035bc7614037e64e ]

Currently, there are issues with enabling PSR-SU + DSC. This stems from
the fact that DSC imposes a slice height on transmitted video data and
we are not conforming to that slice height in PSR-SU regions. So, pass
slice_height into su_y_granularity to feed the DSC slice height into
PSR-SU code.

Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Stable-dep-of: 0b5dfe12755f ("drm/amd/display: fix a divided-by-zero error")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 13b90cf900ab69dd5cab3cc5035bc7614037e64e ]

Currently, there are issues with enabling PSR-SU + DSC. This stems from
the fact that DSC imposes a slice height on transmitted video data and
we are not conforming to that slice height in PSR-SU regions. So, pass
slice_height into su_y_granularity to feed the DSC slice height into
PSR-SU code.

Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Stable-dep-of: 0b5dfe12755f ("drm/amd/display: fix a divided-by-zero error")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: new ABM config 2</title>
<updated>2022-11-23T14:47:13+00:00</updated>
<author>
<name>Camille Cho</name>
<email>Camille.Cho@amd.com</email>
</author>
<published>2022-08-04T05:21:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2aae59444cca97b580143d77c0c4f60c559848db'/>
<id>2aae59444cca97b580143d77c0c4f60c559848db</id>
<content type='text'>
[Why &amp; How]
Add configuration 2 for ABM 2.3/2.4 to suit customer preferences, which
is to lower the brightness curves in 80%-100% range compared to the
existing default config 0.

Reviewed-by: Josip Pavic &lt;Josip.Pavic@amd.com&gt;
Acked-by: Brian Chang &lt;Brian.Chang@amd.com&gt;
Signed-off-by: Camille Cho &lt;Camille.Cho@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why &amp; How]
Add configuration 2 for ABM 2.3/2.4 to suit customer preferences, which
is to lower the brightness curves in 80%-100% range compared to the
existing default config 0.

Reviewed-by: Josip Pavic &lt;Josip.Pavic@amd.com&gt;
Acked-by: Brian Chang &lt;Brian.Chang@amd.com&gt;
Signed-off-by: Camille Cho &lt;Camille.Cho@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Set correct EOTF and Gamut flag in VRR info</title>
<updated>2022-11-09T22:41:41+00:00</updated>
<author>
<name>Mike Hsieh</name>
<email>Mike.Hsieh@amd.com</email>
</author>
<published>2022-10-04T06:58:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=52b5432cd70a2d6d998cb9b48378c37d5bb31e12'/>
<id>52b5432cd70a2d6d998cb9b48378c37d5bb31e12</id>
<content type='text'>
[Why] FreeSync always use G2.2 EOTF and Native gamut
[How] Set EOTF and Gamut flags accordingly

Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Mike Hsieh &lt;Mike.Hsieh@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why] FreeSync always use G2.2 EOTF and Native gamut
[How] Set EOTF and Gamut flags accordingly

Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Mike Hsieh &lt;Mike.Hsieh@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Update 709 gamma to 2.222 as stated in the standerd</title>
<updated>2022-11-09T22:24:40+00:00</updated>
<author>
<name>Nawwar Ali</name>
<email>nawwar.ali@amd.com</email>
</author>
<published>2022-10-19T09:57:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a36021b1fccf1807a5557f35b0b407f1c1a65743'/>
<id>a36021b1fccf1807a5557f35b0b407f1c1a65743</id>
<content type='text'>
[WHY]
    Previously driver use gamma 2.2 for 709 color space,
    but the standard is to use gamma of 2.222

[HOW]
    Change it gamma to 2.222

Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Nawwar Ali &lt;nawwar.ali@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[WHY]
    Previously driver use gamma 2.2 for 709 color space,
    but the standard is to use gamma of 2.222

[HOW]
    Change it gamma to 2.222

Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Nawwar Ali &lt;nawwar.ali@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Wrong colorimetry workaround</title>
<updated>2022-10-27T18:45:14+00:00</updated>
<author>
<name>Ma Hanghong</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2022-10-20T15:46:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b1a98cf89a695d36c414653634ea7ba91b6e701f'/>
<id>b1a98cf89a695d36c414653634ea7ba91b6e701f</id>
<content type='text'>
[Why]
For FreeSync HDR, native color space flag in AMD VSIF(BT.709) should be
used when intepreting content and color space flag in VSC or AVI
infoFrame should be ignored. However, it turned out some userspace
application still use color flag in VSC or AVI infoFrame which is
incorrect.

[How]
Transfer function is used when building the VSC and AVI infoFrame. Set
colorimetry to BT.709 when all the following match:

1. Pixel format is YCbCr;
2. In FreeSync 2 HDR, color is COLOR_SPACE_2020_YCBCR;
3. Transfer function is TRANSFER_FUNC_GAMMA_22;

Tested-by: Mark Broadworth &lt;mark.broadworth@amd.com&gt;
Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Ma Hanghong &lt;hanghong.ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
For FreeSync HDR, native color space flag in AMD VSIF(BT.709) should be
used when intepreting content and color space flag in VSC or AVI
infoFrame should be ignored. However, it turned out some userspace
application still use color flag in VSC or AVI infoFrame which is
incorrect.

[How]
Transfer function is used when building the VSC and AVI infoFrame. Set
colorimetry to BT.709 when all the following match:

1. Pixel format is YCbCr;
2. In FreeSync 2 HDR, color is COLOR_SPACE_2020_YCBCR;
3. Transfer function is TRANSFER_FUNC_GAMMA_22;

Tested-by: Mark Broadworth &lt;mark.broadworth@amd.com&gt;
Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Ma Hanghong &lt;hanghong.ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: fix transfer function passed to build_coefficients()</title>
<updated>2022-10-11T15:33:31+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-09-19T16:36:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a895014853ea6df2778533e2a0bb7a0d53f02ec2'/>
<id>a895014853ea6df2778533e2a0bb7a0d53f02ec2</id>
<content type='text'>
The default argument should be enum TRANSFER_FUNCTION_SRGB rather than
the current boolean value which improperly maps to
TRANSFER_FUNCTION_BT709.

Commit 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients")
looks to have improperly reverted
commit d02097095916 ("drm/amd/display: Add regamma/degamma coefficients and set sRGB when TF is BT709")
replacing the enum value with a boolean value.

Cc: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Cc: Jaehyun Chung &lt;jaehyun.chung@amd.com&gt;
Cc: Zeng Heng &lt;zengheng4@huawei.com&gt;
Fixes: 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients")
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The default argument should be enum TRANSFER_FUNCTION_SRGB rather than
the current boolean value which improperly maps to
TRANSFER_FUNCTION_BT709.

Commit 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients")
looks to have improperly reverted
commit d02097095916 ("drm/amd/display: Add regamma/degamma coefficients and set sRGB when TF is BT709")
replacing the enum value with a boolean value.

Cc: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Cc: Jaehyun Chung &lt;jaehyun.chung@amd.com&gt;
Cc: Zeng Heng &lt;zengheng4@huawei.com&gt;
Fixes: 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients")
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Limit user regamma to a valid value</title>
<updated>2022-09-13T18:33:00+00:00</updated>
<author>
<name>Yao Wang1</name>
<email>Yao.Wang1@amd.com</email>
</author>
<published>2022-08-22T10:30:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=61e4de65b99c616d5e074a9e2a4a1a9f821a964b'/>
<id>61e4de65b99c616d5e074a9e2a4a1a9f821a964b</id>
<content type='text'>
[Why]
For HDR mode, we get total 512 tf_point and after switching to SDR mode
we actually get 400 tf_point and the rest of points(401~512) still use
dirty value from HDR mode. We should limit the rest of the points to max
value.

[How]
Limit the value when coordinates_x.x &gt; 1, just like what we do in
translate_from_linear_space for other re-gamma build paths.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Yao Wang1 &lt;Yao.Wang1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
For HDR mode, we get total 512 tf_point and after switching to SDR mode
we actually get 400 tf_point and the rest of points(401~512) still use
dirty value from HDR mode. We should limit the rest of the points to max
value.

[How]
Limit the value when coordinates_x.x &gt; 1, just like what we do in
translate_from_linear_space for other re-gamma build paths.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Yao Wang1 &lt;Yao.Wang1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Fix HDMI VSIF V3 incorrect issue</title>
<updated>2022-08-10T19:12:13+00:00</updated>
<author>
<name>Leo Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2022-07-22T17:42:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=0591183699fceeafb4c4141072d47775de83ecfb'/>
<id>0591183699fceeafb4c4141072d47775de83ecfb</id>
<content type='text'>
[Why]
Reported from customer the checksum in AMD VSIF V3 is incorrect and
causing blank screen issue.

[How]
Fix the packet length issue on AMD HDMI VSIF V3.

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Leo Ma &lt;hanghong.ma@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
Reported from customer the checksum in AMD VSIF V3 is incorrect and
causing blank screen issue.

[How]
Fix the packet length issue on AMD HDMI VSIF V3.

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Leo Ma &lt;hanghong.ma@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amd/display: Disable PSRSU when DSC enabled on the specific sink</title>
<updated>2022-07-12T20:50:29+00:00</updated>
<author>
<name>Robin Chen</name>
<email>po-tchen@amd.com</email>
</author>
<published>2022-06-20T16:18:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e2facd575fdf13b718f6c833ed546467a3e6e3ba'/>
<id>e2facd575fdf13b718f6c833ed546467a3e6e3ba</id>
<content type='text'>
[Why]
Some specific sink is not able to support PSRSU when DSC is turned on.
For this case, fall-back to use PSR1.

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Solomon Chiu &lt;solomon.chiu@amd.com&gt;
Signed-off-by: Robin Chen &lt;po-tchen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[Why]
Some specific sink is not able to support PSRSU when DSC is turned on.
For this case, fall-back to use PSR1.

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Solomon Chiu &lt;solomon.chiu@amd.com&gt;
Signed-off-by: Robin Chen &lt;po-tchen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
