linux-stable.git/drivers/gpu/drm/amd/display/dc, branch v5.7

drm/amd/display: Fix potential integer wraparound resulting in a hang

2020-05-27T22:13:14+00:00

[Why]
If VUPDATE_END is before VUPDATE_START the delay calculated can become
very large, causing a soft hang.

[How]
Take the absolute value of the difference between START and END.

Signed-off-by: Aric Cyr 
Reviewed-by: Nicholas Kazlauskas 
Acked-by: Qingqing Zhuo 
Signed-off-by: Alex Deucher 
Cc: stable@vger.kernel.org

drm/amd/display: Defer cursor lock until after VUPDATE

2020-05-20T21:32:13+00:00

[Why]
We dropped the delay after changed the cursor functions locking the
entire pipe to locking just the CURSOR registers to fix page flip
stuttering - this introduced cursor stuttering instead, and an underflow
issue.

The cursor update can be delayed indefinitely if the cursor update
repeatedly happens right around VUPDATE.

The underflow issue can happen if we do a viewport update on a pipe
on the same frame where a cursor update happens around VUPDATE - the
old cursor registers are retained which can be in an invalid position.

This can cause a pipe hang and indefinite underflow.

[How]
The complex, ideal solution to the problem would be a software
triple buffering mechanism from the DM layer to program only one cursor
update per frame just before VUPDATE.

The simple workaround until we have that infrastructure in place is
this change - bring back the delay until VUPDATE before locking, but
with some corrections to the calculations.

This didn't work for all timings before because the calculation for
VUPDATE was wrong - it was using the offset from VSTARTUP instead and
didn't correctly handle the case where VUPDATE could be in the back
porch.

Add a new hardware sequencer function to use the existing helper to
calculate the real VUPDATE start and VUPDATE end - VUPDATE can last
multiple lines after all.

Change the udelay to incorporate the width of VUPDATE as well.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Aric Cyr 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: Remove dml_common_def file

2020-05-20T21:25:43+00:00

During the rework for removing the FPU issues, I found the following
warning:

 [..] dml_common_defs.o: warning: objtool: dml_round()+0x9: FPU
      instruction outside of kernel_fpu_{begin,end}()

This file has a single function that does not need to be in a specific
file. This commit drop dml_common_defs file, and move dml_round function
to dml_inline_defs.

CC: Christian König 
CC: Alexander Deucher 
CC: Peter Zijlstra 
CC: Tony Cheng 
CC: Harry Wentland 
Signed-off-by: Rodrigo Siqueira 
Reviewed-by: Dmytro Laktyushkin 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: DP training to set properly SCRAMBLING_DISABLE

2020-05-20T21:23:51+00:00

[Why]
DP training sequence to set SCRAMBLING_DISABLE bit properly based on
training pattern - per DP Spec.

[How]
Update dpcd_pattern.v1_4.SCRAMBLING_DISABLE with 1 for TPS1, TPS2, TPS3,
but not for TPS4.

Signed-off-by: Vladimir Stempen 
Reviewed-by: Wenjing Liu 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: fix counter in wait_for_no_pipes_pending

2020-05-05T20:13:15+00:00

[Why]
Wait counter is not being reset for each pipe.

[How]
Move counter reset into pipe loop scope.

Signed-off-by: Roman Li 
Reviewed-by: Zhan Liu 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher

drm/amd/display: Update DCN2.1 DV Code Revision

2020-05-05T20:07:02+00:00

[WHY & HOW]
There is a problem in hscale_pixel_rate, the bug
causes DCN to be more optimistic (more likely to underflow)
in upscale cases during prefetch.
This commit ports the fix from DV code to address these issues.

Signed-off-by: Sung Lee 
Reviewed-by: Dmytro Laktyushkin 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher

drm/amd/display: work around fp code being emitted outside of DC_FP_START/END

2020-05-01T13:24:40+00:00

The dcn20_validate_bandwidth function would have code touching the
incorrect registers emitted outside of the boundaries of the
DC_FP_START/END macros, at least on ppc64le. Work around the
problem by wrapping the whole function instead.

Signed-off-by: Daniel Kolesa 
Signed-off-by: Alex Deucher 
Cc: stable@vger.kernel.org # 5.6.x

drm/amdgpu/dc: Use WARN_ON_ONCE for ASSERT

2020-05-01T13:24:40+00:00

Once should generally be enough for diagnosing what lead up to it,
repeating it over and over can be pretty annoying.

Signed-off-by: Michel Dänzer 
Signed-off-by: Alex Deucher

drm/amd/display: Use cursor locking to prevent flip delays

2020-04-28T20:45:14+00:00

[Why]
Current locking scheme for cursor can result in a flip missing
its vsync, deferring it for one or more vsyncs.  Result is a
potential for stuttering when cursor is moved.

[How]
Use cursor update lock so that flips are not blocked while cursor
is being programmed.

Signed-off-by: Aric Cyr 
Reviewed-by: Nicholas Kazlauskas 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher

drm/amd/display: Update downspread percent to match spreadsheet for DCN2.1

2020-04-28T20:44:36+00:00

[WHY]
The downspread percentage was copied over from a previous version
of the display_mode_lib spreadsheet. This value has been updated,
and the previous value is too high to allow for such modes as
4K120hz. The new value is sufficient for such modes.

[HOW]
Update the value in dcn21_resource to match the spreadsheet.

Signed-off-by: Sung Lee 
Reviewed-by: Yongqiang Sun 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher