linux-stable.git/drivers/gpu/drm/amd/display/dc/link, branch linux-6.2.y

drm/amd/display: Phase 1 Add Bw Allocation source and header files

2022-11-23T14:47:14+00:00

[WHY]
To implement BW Allocation as per USB4 spec chapter 10.7

[HOW]
Implement the DP-Tx portion of the logic to interact with DPIA

Reviewed-by: Wenjing Liu 
Reviewed-by: Jun Lei 
Acked-by: Brian Chang 
Signed-off-by: Mustapha Ghaddar 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: move stream encoder audio setup to link_hwss

2022-10-24T18:35:34+00:00

Unify stream encoder audio setup interface.

Tested-by: Mark Broadworth 
Reviewed-by: Charlene Liu 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Wenjing Liu 
Signed-off-by: Alex Deucher

drm/amd/display: refactor enable/disable audio stream hw sequence

2022-10-24T18:35:27+00:00

[why]
1. As recommended by hardware team, don't enable APG when stream is not
   enabled.
2. Move audio stream encoder programming into link_hwss.

[how]
1. Merge dp_audio_enable into enable audio stream hw sequence.
2. Move stream encoder programming into link hwss level to unify stream
   encoder programming interface.

Tested-by: Mark Broadworth 
Reviewed-by: Charlene Liu 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Wenjing Liu 
Signed-off-by: Alex Deucher

drm/amd/display: Use correct pixel clock to program DTBCLK DTO's

2022-10-10T21:17:36+00:00

[Why?]
Currently phy_pix_clk is used to program DTO's which is incorrect.

[How?]
Use the timing pixel clock to program DTO's correctly.

Reviewed-by: Martin Leung 
Tested-by: Daniel Wheeler 
Acked-by: Qingqing Zhuo 
Signed-off-by: Dillon Varone 
Signed-off-by: Alex Deucher

drm/amd/display: rework recent update PHY state commit

2022-09-19T19:10:24+00:00

[why]
Original change 594b237b9a07 ("drm/amd/display: Add
interface to track PHY state") was implemented by assuming stream's
dpms off is equivalent to PHY power off.
This assumption doesn't hold in following situations:
1. MST multiple stream scenario, where multiple streams are sharing the
same PHY output. Toggle dpms off for one of the stream doesn't power
off the PHY due to the presence of other streams.
2. enable stream failure scenario, where enable stream fails due to
failure of link training. This will cause DPMS off is set to false, while
the actual PHY power state is off in certain cases.
Due to the problematic assumption, the logic will skip disabling
other streams for MST multiple stream scenario, therefore PHY is
not actually powered off.

[how]
1. Rework this refactor by moving PHY state update down to hardware
level, where we update PHY state in place when hardware sequencer
is actually changing the power state of the PHY hardware.
2. Reimplement symclk on TX off workaround in place when we are actually
calling transmitter control to power off PHY in dcn32. Note the workaround is
added due to the lack of proper software interface to set TX while keeping
symclk on. We plan to address this interface problem so we can set TX off
only without affecting symclk in future dcn versions.

Fixes: 594b237b9a07 ("drm/amd/display: Add interface to track PHY state")
Reviewed-by: Jun Lei 
Acked-by: Wayne Lin 
Signed-off-by: Wenjing Liu 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming

2022-08-29T21:45:10+00:00

[Why]
Each index in the DPSTREAMCLK_CNTL register
phyiscally maps 1-to-1 with HPO stream encoder
instance. On the other hand, each index in
DTBCLK_P_CNTL physically maps 1-to-1 with OTG
instance.

Current DCN32 DPSTREAMCLK_CLK programing assumes
that OTG instance always maps 1-to-1 with
HPO stream encoder instance. This is not always
guaranteed and can result in blackscreen.

[How]
Program the correct dpstreamclk instance with
the correct dtbclk_p source.

Reviewed-by: Ariel Bernstein 
Acked-by: Brian Chang 
Signed-off-by: George Shen 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Fix dpstreamclk programming

2022-07-25T21:17:10+00:00

[WHY]
Currently programming incorrect hpo inst as well as selecting incorrect source

[HOW]
Use hpo inst instead of otg inst to select dpstreamclk inst

Reviewed-by: Nicholas Kazlauskas 
Acked-by: Alex Hung 
Signed-off-by: Michael Strauss 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add enable/disable FIFO callbacks to stream setup

2022-07-25T21:14:50+00:00

[Why]
We don't write out attributes after disabling and re-enabling the link
on some monitors, causing some, but not all, HDMI displays to fail to
lightup on DCN314.

[How]
Firmware used to do this after DIG link setup.

Since firmware is no longer doing this to support USB4 and dynamic link
remapping we'll need to add this to driver in the equivalent paths.

New optional callbacks were created in the stream encoder interface and
implementations were added for DCN314.

Reviewed-by: Michael Strauss 
Acked-by: Alex Hung 
Signed-off-by: Nicholas Kazlauskas 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: revert Blank eDP on disable/enable drv

2022-06-01T19:56:48+00:00

why and how:
Revert this change. It was causing a black screen with certain blocks

Reviewed-by: George Shen 
Acked-by: Jasdeep Dhillon 
Tested-by: Daniel Wheeler 
Signed-off-by: Leung, Martin 
Signed-off-by: Alex Deucher

drm/amd/display: extract update stream allocation to link_hwss

2022-04-13T13:14:22+00:00

[why]
Extract update stream allocation table into link hwss as part of the
link hwss refactor work.

Reviewed-by: George Shen 
Reviewed-by: Fangzhi Zuo 
Acked-by: Pavle Kotarac 
Signed-off-by: Wenjing Liu 
Signed-off-by: Alex Deucher