linux-stable.git/drivers/gpu/drm/amd/display/dc/dm_helpers.h, branch linux-5.10.y

drm/amd/display: Add DCN3 Support in DM (v2)

2020-07-01T05:59:15+00:00

Handle DCN3 in amdgpu_dm

v2: fix num_pkrs handling

Signed-off-by: Bhawanpreet Lakha 
Signed-off-by: Alex Deucher

drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED

2019-11-13T20:29:44+00:00

[Why]

DCN2 and DSC are stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup NV defninitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN2 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * dce/dce_dmcu.c: dcn20_*lock_phy()
    * dce/dce_dmcu.c: dcn20_funcs
    * dce/dce_dmcu.c: dcn20_dmcu_create()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Leo Li 
Signed-off-by: Bhawanpreet Lakha 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amd/display: Don't allocate payloads if link lost

2019-09-13T22:55:01+00:00

We should not allocate payloads if the link is lost until the link is retrained.
Some displays require this.

Signed-off-by: Alvin Lee 
Reviewed-by: Wenjing Liu 
Acked-by: Bhawanpreet Lakha 
Signed-off-by: Alex Deucher

drm/amd/display: Add DSC support for Navi (v2)

2019-06-22T14:34:07+00:00

Add support for DCN2 DSC (Display Stream Compression)

HW Blocks:

 +--------++------+       +----------+
 | HUBBUB || HUBP |  <--  | MMHUBBUB |
 +--------++------+       +----------+
        |                     ^
        v                     |
    +--------+            +--------+
    |  DPP   |            |  DWB   |
    +--------+            +--------+
        |
        v                      ^
    +--------+                 |
    |  MPC   |                 |
    +--------+                 |
        |                      |
        v                      |
    +-------+      +-------+   |
    |  OPP  | <--> |  DSC  |   |
    +-------+      +-------+   |
        |                      |
        v                      |
    +--------+                /
    |  OPTC  |  --------------
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+

v2: rebase (Alex)

Signed-off-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amd/display: Poll pending DOWN_REP before enabling the link

2019-03-19T20:04:02+00:00

[Why]
With special monitor combination on MST, the UP_REQ could come
after clear payload table. It makes the pending DOWN_REP fail
to be handled after link training and the new DOWN_REQ will be queued
until time out .

[How]
To move the current polling pending DOWN_REP procedure to after
clear payload table to make sure the pending DOWN_REP can be
done before enabling the link.

Signed-off-by: Martin Tsai 
Reviewed-by: Tony Cheng 
Acked-by: Bhawanpreet Lakha 
Signed-off-by: Alex Deucher

drm/amd/display: Poll pending down rep before clear payload allocation table

2019-01-28T16:43:46+00:00

[Why]
On current design, driver cannot handle the interrupt for
down reply when link training is processing. The DOWN REQ
send before link training will keep in the pending DOWN REP
state in the queue.
It makes the next DOWN REQ be queued until time out.

[How]
To add a polling sequence before clear payload allocation table
to make sure the pending DOWN REP can be handled.

Signed-off-by: Martin Tsai 
Reviewed-by: Charlene Liu 
Acked-by: Leo Li 
Signed-off-by: Alex Deucher

drm/amd/display: Add hook for MST root branch info

2018-07-16T21:11:49+00:00

This allows DM to do any necessary updates before MST discovery starts.

Signed-off-by: Nikola Cornij 
Reviewed-by: Nikola Cornij 
Acked-by: Leo Li 
Signed-off-by: Alex Deucher

drm/amd/display: Serialize is_dp_sink_present

2018-07-13T19:48:21+00:00

Access to GPIO needs to be serialized. Aux transactions are already
serialized in DRM but we also need to serialize access to the GPIO pin
for purposes of DP dongle detection.

Call is_dp_sink_present through DM so we can lock correctly. This
follows the same pattern used for DPCD transactions.

Signed-off-by: Harry Wentland 
Reviewed-by: Jun Lei 
Acked-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amd/display: add diags clock programming

2018-03-05T20:34:40+00:00

Signed-off-by: Dmytro Laktyushkin 
Reviewed-by: Dmytro Laktyushkin 
Acked-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amd/display: move MST branch initialize to before link training

2018-03-05T20:32:20+00:00

some MST capable scaler doesn't like recieving CLEAR_PAYLOAD_ID_TABLE after
link training.  move branch initialize to before link training

Signed-off-by: Hersen Wu 
Signed-off-by: Tony Cheng 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
Signed-off-by: Alex Deucher