linux-stable.git/drivers/gpu/drm/amd/display/dc/dce, branch v6.2 Linux kernel stable tree drm/amd/display: Waiting for 1 frame to fix the flash issue on PSR1 2022-11-09T22:24:57+00:00 Ryan Lin tsung-hua.lin@amd.com 2022-10-26T07:12:26+00:00 1a2b886b1f242044840147347db1a595cd7f5f56 [Why] Needs more frames waiting before the PSR_Exit sending for the specific TCON. [How] Add relock_delay_frame_cnt to control how many frames waiting are needed before the PSR_Exit sending. The default value is 0. The Driver side can set this variable for specific TCONs. Reviewed-by: Robin Chen <robin.chen@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Ryan Lin <tsung-hua.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
Needs more frames waiting before the PSR_Exit sending for the specific
TCON.

[How]
Add relock_delay_frame_cnt to control how many frames waiting are needed
before the PSR_Exit sending. The default value is 0. The Driver side can
set this variable for specific TCONs.

Reviewed-by: Robin Chen <robin.chen@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Ryan Lin <tsung-hua.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Modify checks to enable TPS3 pattern when required 2022-11-01T15:47:25+00:00 Iswara Nagulendran iswara.nagulendran@amd.com 2022-10-21T16:27:12+00:00 361edc61a05cdbc99c6b53264d42af1533e9c20c [HOW&WHY] Checking if both DSC and FEC supported from sink and source before going with TPS3 pattern during link training. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[HOW&WHY]
Checking if both DSC and FEC supported from sink and
source before going with TPS3 pattern during link
training.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com>
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Drop struct crc_region and reuse struct rect 2022-10-27T18:42:40+00:00 Alan Liu HaoPing.Liu@amd.com 2022-10-20T15:46:43+00:00 62fa035b5605a993fa3b4526af8b6ed145e3ce1b [Why] reuse struct rect rather than adding a new struct. [How] - Userspace keeps inputting x_start, y_start, x_end, y_end - We translate data to x, y, width, height in code flow to store - translate back to x_start, y_start, x_end, y_end before programming HW Tested-by: Mark Broadworth <mark.broadworth@amd.com> Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
reuse struct rect rather than adding a new struct.

[How]
- Userspace keeps inputting x_start, y_start, x_end, y_end
- We translate data to x, y, width, height in code flow to store
- translate back to x_start, y_start, x_end, y_end before programming HW

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: AUX tracing cleanup 2022-10-06T15:59:48+00:00 Leo (Hanghong) Ma hanghong.ma@amd.com 2022-09-20T19:23:42+00:00 749b6c2ac9d9a7a4d8f4c2e4dc6fa830fd6c6ac7 [Why && How] Remove the unnecessary AUX trace and use one trace for AUX failure. Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why && How]
Remove the unnecessary AUX trace and use one trace for AUX failure.

Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Revise Sink device string ID 2022-09-19T19:16:26+00:00 Robin Chen po-tchen@amd.com 2022-09-08T13:42:10+00:00 8bc14183988849e99046595785ceadbe0b88f7a7 [Why] The Sink device string ID1/ID2 use 5 bytes instead of 6 bytes, so the driver should compare the first 5 bytes only. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Robin Chen <po-tchen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
The Sink device string ID1/ID2 use 5 bytes instead of 6 bytes,
so the driver should compare the first 5 bytes only.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Robin Chen <po-tchen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: fix repeated words in comments 2022-09-13T18:32:58+00:00 Jilin Yuan yuanjilin@cdjrlc.com 2022-09-07T04:10:58+00:00 65529fa32c60ea15514e99b6ea12304aea732b67 Delete the redundant word 'in'. Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Delete the redundant word 'in'.

Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Change AUX NACK behavior 2022-08-25T17:34:40+00:00 Ilya Bakoulin Ilya.Bakoulin@amd.com 2022-08-04T17:44:51+00:00 95bbbb88ed49f6d4f46c9a23be0ba94db2fa65e9 [Why] Retrying on receiving a NACK can result in long overall EDID read times in some cases. [How] Retry only on DEFER and return immediately on NACK. Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
Retrying on receiving a NACK can result in long overall EDID read times
in some cases.

[How]
Retry only on DEFER and return immediately on NACK.

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fix pixel clock programming 2022-08-16T22:07:21+00:00 Ilya Bakoulin Ilya.Bakoulin@amd.com 2022-07-26T20:19:38+00:00 04fb918bf421b299feaee1006e82921d7d381f18 [Why] Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned between different HDMI lanes when using YCbCr420 10-bit pixel format. BIOS functions for transmitter/encoder control take pixel clock in kHz increments, whereas the function for setting the pixel clock is in 100Hz increments. Setting pixel clock to a value that is not on a kHz boundary will cause the issue. [How] Round pixel clock down to nearest kHz in 10/12-bpc cases. Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why]
Some pixel clock values could cause HDMI TMDS SSCPs to be misaligned
between different HDMI lanes when using YCbCr420 10-bit pixel format.

BIOS functions for transmitter/encoder control take pixel clock in kHz
increments, whereas the function for setting the pixel clock is in 100Hz
increments. Setting pixel clock to a value that is not on a kHz boundary
will cause the issue.

[How]
Round pixel clock down to nearest kHz in 10/12-bpc cases.

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/dc/dce: fix repeated words in comments 2022-07-28T20:05:14+00:00 wangjianli wangjianli@cdjrlc.com 2022-07-24T07:41:50+00:00 aa316247c726d96f0bc205413c54ab49622ca737 Delete the redundant word 'in'. Signed-off-by: wangjianli <wangjianli@cdjrlc.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Delete the redundant word 'in'.

Signed-off-by: wangjianli <wangjianli@cdjrlc.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding 2022-07-25T21:16:45+00:00 Michael Strauss michael.strauss@amd.com 2022-06-09T14:45:34+00:00 1c5a2fa97b91d37375f4fc8aeb37c9456c93c828 [WHY] DP DTO isn't used for 128b/132b encoding [HOW] Check current link rate to determine whether using 8b/10b or 128/132b encoding Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[WHY]
DP DTO isn't used for 128b/132b encoding

[HOW]
Check current link rate to determine whether using 8b/10b or 128/132b encoding

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>