linux-stable.git/drivers/gpu/drm/amd/display/dc/dce, branch v6.14

drm/amd/display: Use HW lock mgr for PSR1 when only one eDP

2025-03-18T20:33:11+00:00

[WHY]
DMUB locking is important to make sure that registers aren't accessed
while in PSR.  Previously it was enabled but caused a deadlock in
situations with multiple eDP panels.

[HOW]
Detect if multiple eDP panels are in use to decide whether to use
lock. Refactor the function so that the first check is for PSR-SU
and then replay is in use to prevent having to look up number
of eDP panels for those configurations.

Fixes: f245b400a223 ("Revert "drm/amd/display: Use HW lock mgr for PSR1"")
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3965
Reviewed-by: ChiaHsuan Chung 
Signed-off-by: Mario Limonciello 
Signed-off-by: Alex Hung 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher 
(cherry picked from commit ed569e1279a3045d6b974226c814e071fa0193a6)
Cc: stable@vger.kernel.org

Revert "drm/amd/display: Use HW lock mgr for PSR1"

2025-02-04T22:47:34+00:00

This reverts commit
a2b5a9956269 ("drm/amd/display: Use HW lock mgr for PSR1")

Because it may cause system hang while connect with two edp panel.

Acked-by: Wayne Lin 
Signed-off-by: Tom Chung 
Signed-off-by: Alex Deucher

drm/amd/display: Use HW lock mgr for PSR1

2025-01-10T17:11:47+00:00

[Why]
Without the dmub hw lock, it may cause the lock timeout issue
while do modeset on PSR1 eDP panel.

[How]
Allow dmub hw lock for PSR1.

Reviewed-by: Sun peng Li 
Signed-off-by: Tom Chung 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Update dc_tiling_info union to structure

2025-01-06T19:44:27+00:00

[WHY]
The `dc_tiling_info` union previously did not have a field to
specify the active GFX format, assuming only one format would
be used per DCN version. from DCN4+, support for switching
between different GFX formats is introduced, requiring a way
to track which format is currently in use.

[HOW]
Updated the `dc_tiling_info` union to include a new field that
explicitly indicates the currently used GFX format.
This allows the system to determine the active GFX format
and take the correct programming path accordingly.

[Description]
The union `dc_tiling_info` has been updated to support multiple
GFX formats by adding a new field for identifying the active format.
This update ensures that the correct programming path is followed
based on the selected format. All references to `dc_tiling_info`
in the codebase have been updated to reflect the new structure.

Reviewed-by: Alvin Lee 
Signed-off-by: Karthi Kandasamy 
Signed-off-by: Roman Li 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Block Invalid TMDS operation

2024-12-18T17:21:37+00:00

[Why]
When sink type is TMDS, PHY programming does not block against pixel
clock greater than 600MHz.

[How]
Based on sink type, block greater than 600MHz phy programming.

Tested-by: Daniel Wheeler 
Reviewed-by: Aric Cyr 
Signed-off-by: Chris Park 
Signed-off-by: Dillon Varone 
Signed-off-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: add clear_tiling mi callbacks

2024-12-18T17:14:04+00:00

This adds clear_tiling callbacks to the mi structure that
will be used for drm panic support to clear the tiling on
a display.  Mem input (mi) is used on DCE based display
IPs.

Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher 
Cc: Lu Yao 
Cc: Jocelyn Falempe 
Cc: Harry Wentland

drm/amd/display: remove clearance code of force_ffu_mode flag in dmub_psr_copy_settings()

2024-12-10T15:37:10+00:00

[Why/How]
The force_ffu_mode flag could be initialized at other place.

Reviewed-by: Robin Chen 
Signed-off-by: Zhongwei 
Signed-off-by: Aurabindo Pillai 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Remove useless assignments and variables

2024-10-28T20:36:13+00:00

[WHAT & HOW]
misc0, temp and split_pipe are assigned but immediately re-assigned
to other values. The early assignments are useless and are removed.
Unused variables are removed as well.

This fixes 5 UNUSED_VALUE issues reported by Coverity.

Reviewed-by: Rodrigo Siqueira 
Signed-off-by: Alex Hung 
Signed-off-by: Tom Chung 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Retry Replay residency

2024-08-27T21:53:14+00:00

[Why]
Because sometime DMUB GPINT will time out,
 it will cause we return 0 as residency number.

[How]
Retry to avoid this happened.

Reviewed-by: Robin Chen 
Signed-off-by: ChunTao Tso 
Signed-off-by: Zaeem Mohamed 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Replace dm_execute_dmub_cmd with dc_wake_and_execute_dmub_cmd

2024-08-06T14:36:04+00:00

In the commit c2cec7a872b6 ("drm/amd/display: Wake DMCUB before sending
a command for replay feature"), replaced dm_execute_dmub_cmd with
dc_wake_and_execute_dmub_cmd in multiple areas, but due to merge issues
the replacement of this function in the dmub_replay_copy_settings was
missed. This commit replaces the old dm_execute_dmub_cmd with
dc_wake_and_execute_dmub_cmd.

Fixes: 3601a35a2e9d ("drm/amd/display: Wake DMCUB before sending a command for replay feature")
Reviewed-by: Aurabindo Pillai 
Tested-by: Daniel Wheeler 
Signed-off-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher