linux-stable.git/drivers/gpu/drm/amd/display/dc/dce, branch linux-6.17.y

drm/amd/display: Add fast sync field in ultra sleep more for DMUB

2025-11-13T20:37:29+00:00

[ Upstream commit b65cf4baeb24bdb5fee747679ee88f1ade5c1d6c ]

[Why&How]
We need to inform DMUB whether fast sync in ultra sleep mode is supported,
so that it can disable desync error detection when the it is not enabled.
This helps prevent unexpected desync errors when transitioning out of
ultra sleep mode.

Add fast sync in ultra sleep mode field in replay copy setting command.

Reviewed-by: Robin Chen 
Reviewed-by: Nicholas Kazlauskas 
Signed-off-by: Allen Li 
Signed-off-by: Ivan Lipski 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amd/display: Properly disable scaling on DCE6

2025-10-19T14:37:13+00:00

[ Upstream commit a7dc87f3448bea5ebe054f14e861074b9c289c65 ]

SCL_SCALER_ENABLE can be used to enable/disable the scaler
on DCE6. Program it to 0 when scaling isn't used, 1 when used.
Additionally, clear some other registers when scaling is
disabled and program the SCL_UPDATE register as recommended.

This fixes visible glitches for users whose BIOS sets up a
mode with scaling at boot, which DC was unable to clean up.

Fixes: b70aaf5586f2 ("drm/amd/display: dce_transform: add DCE6 specific macros,functions")
Reviewed-by: Alex Deucher 
Signed-off-by: Timur Kristóf 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amd/display: Properly clear SCL_*_FILTER_CONTROL on DCE6

2025-10-19T14:37:13+00:00

[ Upstream commit c0aa7cf49dd6cb302fe28e7183992b772cb7420c ]

Previously, the code would set a bit field which didn't exist
on DCE6 so it would be effectively a no-op.

Fixes: b70aaf5586f2 ("drm/amd/display: dce_transform: add DCE6 specific macros,functions")
Reviewed-by: Alex Deucher 
Signed-off-by: Timur Kristóf 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amd/display: Add missing DCE6 SCL_HORZ_FILTER_INIT* SRIs

2025-10-19T14:37:12+00:00

[ Upstream commit d60f9c45d1bff7e20ecd57492ef7a5e33c94a37c ]

Without these, it's impossible to program these registers.

Fixes: 102b2f587ac8 ("drm/amd/display: dce_transform: DCE6 Scaling Horizontal Filter Init (v2)")
Reviewed-by: Alex Deucher 
Signed-off-by: Timur Kristóf 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin

drm/amd/display: Don't warn when missing DCE encoder caps

2025-08-18T22:00:11+00:00

On some GPUs the VBIOS just doesn't have encoder caps,
or maybe not for every encoder.

This isn't really a problem and it's handled well,
so let's not litter the logs with it.

Signed-off-by: Timur Kristóf 
Acked-by: Alex Deucher 
Reviewed-by: Rodrigo Siqueira 
Reviewed-by: Alex Hung 
Signed-off-by: Alex Deucher 
(cherry picked from commit 33e0227ee96e62d034781e91f215e32fd0b1d512)

drm/amd/display: Revert Add HPO encoder support to Replay

2025-08-18T21:41:43+00:00

This reverts commits:
commit 1f26214d268b ("drm/amd/display: Add HPO encoder support to Replay")
commit 3bfce48b109f ("drm/amd/display: Add support for Panel Replay on DP1 eDP (panel_inst=1)")
due to visual confirm issue.

Reviewed-by: Nicholas Kazlauskas 
Signed-off-by: Gabe Teeger 
Signed-off-by: Wayne Lin 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher 
(cherry picked from commit 92f68f6a1b297633159a3f3759e4dfc7e5b58abb)

drm/amd/display: Fix misuse of /** to /* in 'dce_i2c_hw.c'

2025-07-28T20:25:46+00:00

Fix the comment style before cntl_stuck_hw_workaround() by replacing
'/**' with '/*' since it is not a kdoc comment.

Fixes the below with gcc W=1:
display/dc/dce/dce_i2c_hw.c:380: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* If we boot without an HDMI display, the I2C engine does not get
  initialized

Fixes: 04d57f4462a6 ("drm/amd/display: Workaround for stuck I2C arbitrage")
Cc: Alvin Lee 
Cc: Dominik Kaszewski 
Cc: Ivan Lipski 
Cc: Harry Wentland 
Cc: Tom Chung 
Cc: Roman Li 
Cc: Alex Hung 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Alex Hung 
Signed-off-by: Alex Deucher

drm/amd/display: Add HPO encoder support to Replay

2025-07-15T18:07:52+00:00

[why & how]
UHBR link rate capable eDPs will use HPO for encoding. Need to pass
HPO stream and link encoder instances to DMCUB for Replay FSM to
know which instances to use.

Reviewed-by: Charlene Liu 
Signed-off-by: Ovidiu Bunea 
Signed-off-by: Ivan Lipski 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add support for Panel Replay on DP1 eDP (panel_inst=1)

2025-07-15T18:07:52+00:00

[why & how]
DP1 eDP is still considered a single-eDP case and should support Panel Replay.
Modify secondary eDP policy to reflect this and update Replay state accordingly.

Reviewed-by: Charlene Liu 
Signed-off-by: Ovidiu Bunea 
Signed-off-by: Ivan Lipski 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Workaround for stuck I2C arbitrage

2025-07-15T18:07:51+00:00

[Why]
When booting without an HDMI display connected, the I2C registers
are not initialized correctly, leading to DC_I2C_ARBITRATION register
getting stuck with DC_I2C_REG_RW_CNTL_STATUS == USED_BY_SW.

[How]
* Correct TOCTOU race condition in engine acquire logic which did not
check against DMUB trying to acquire it at the same time.
* Deassert SOFT_RESET before acquire, as it can block access to other
I2C registers.
* Add a workaround in release, checking that after triggerring
DC_I2C_SW_DONE_USING_I2C_REG, DC_I2C_REG_RW_CNTL_STATUS != USED_BY_SW.
If necessary, trigger DC_I2C_SW_DONE_USING_I2C_REG again.
* Remove unnecessary clear of DC_I2C_SW_USE_I2C_REG_REQ, which engine
ignores according to specification.

Reviewed-by: Alvin Lee 
Signed-off-by: Dominik Kaszewski 
Signed-off-by: Ivan Lipski 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher