linux-stable.git/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h, branch v7.2

drm/amd/display: Fix amdgpu_dm KUnit allmodconfig build

2026-05-27T14:22:49+00:00

[Why]
With CONFIG_DRM_AMD_DC_KUNIT_TEST=m, allmodconfig only defines the
_MODULE variant. Four KUnit helper headers gate their declarations
with #ifdef CONFIG_DRM_AMD_DC_KUNIT_TEST, so the declarations vanish
while the matching .c files (driven by IS_ENABLED() via
STATIC_IFN_KUNIT) keep the functions non-static. The build breaks
with implicit declarations and -Werror=missing-prototypes.

amdgpu_dm_crc.h additionally uses symbols that its test file does not
pull in indirectly, amdgpu_dm_colorop_test.c has a copy-paste
duplicate function with the wrong expected bitmask, and the three
colorop TF bitmasks are not exported for modpost.

[How]
- Switch the crc/hdcp/color/psr KUnit guards to IS_ENABLED().
- Make amdgpu_dm_crc.h self-contained (dc_types.h + forward decl).
- Rename the duplicated shaper test back to its intended name and
  fix its expected bitmask.
- Export amdgpu_dm_supported_{degam,shaper,blnd}_tfs via
  EXPORT_IF_KUNIT().

Assisted-by: Copilot:claude-4-opus
Reviewed-by: Alex Hung 
Acked-by: Alex Deucher 
Signed-off-by: Ray Wu 
Signed-off-by: Alex Deucher

drm/amd/display: Add KUnit test for HDCP process_output

2026-05-19T15:54:36+00:00

Expose process_output() as non-static when CONFIG_DRM_AMD_DC_KUNIT_TEST
is enabled and add KUnit tests exercising its full branch logic:

- property_validate_dwork is always enqueued (delay=0)
- callback_dwork is scheduled when callback_needed is set
- callback_dwork is cancelled when callback_stop is set
- watchdog_timer_dwork is scheduled when watchdog_timer_needed is set
- watchdog_timer_dwork is cancelled when watchdog_timer_stop is set
- Both dworks are scheduled independently when both flags are set

Assisted-by: Copilot:Claude-Sonnet-4.6
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Hung 
Signed-off-by: Ivan Lipski 
Tested-by: Dan Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add missing SPDX license identifier

2025-07-28T20:40:30+00:00

[Why]
All files should be properly classified.

[How]
Add missing SPDX-License-Identifier.

Reviewed-by: Sun peng (Leo) Li 
Signed-off-by: Mario Limonciello 
Signed-off-by: Ivan Lipski 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: phase2 enable mst hdcp multiple displays

2023-01-17T20:41:19+00:00

[why]
For MST topology with 1 physical link and multiple connectors (>=2),
e.g. daisy cahined MST + SST, or 1-to-multi MST hub, if userspace
set to enable the HDCP simultaneously on all connected outputs, the
commit tail iteratively call the hdcp_update_display() for each
display (connector). However, the hdcp workqueue data structure for
each link has only one DM connector and encryption status members,
which means the work queue of property_validate/update() would only
be triggered for the last connector within this physical link, and
therefore the HDCP property value of other connectors would stay on
DESIRED instead of switching to ENABLED, which is NOT as expected.

[how]
Use array of AMDGPU_DM_MAX_DISPLAY_INDEX for both aconnector and
encryption status in hdcp workqueue data structure for each physical
link. For property validate/update work queue, we iterates over the
array and do similar operation/check for each connected display.

Tested-by: Daniel Wheeler 
Signed-off-by: hersen wu 
Signed-off-by: Alex Deucher

drm/amd/display: save restore hdcp state when display is unplugged from mst hub

2022-12-20T17:47:28+00:00

[Why]
connector hdcp properties are lost after display is
unplgged from mst hub. connector is destroyed with
dm_dp_mst_connector_destroy. when display is plugged
back, hdcp is not desired and it wouldnt be enabled.

[How]
save hdcp properties into hdcp_work within
amdgpu_dm_atomic_commit_tail. If the same display is
plugged back with same display index, its hdcp
properties will be retrieved from hdcp_work within
dm_dp_mst_get_modes.

Acked-by: Aurabindo Pillai 
Signed-off-by: hersen wu 
Reviewed-by: Bhawanpreet Lakha 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amdgpu/display: remove hdcp_srm sysfs on device removal

2021-02-18T21:43:08+00:00

Fixes: 9037246bb2da5 ("drm/amd/display: Add sysfs interface for set/get srm")

Signed-off-by: Nirmoy Das 
Acked-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amd/display: Add sysfs interface for set/get srm

2020-02-06T20:04:36+00:00

[Why]
PSP doesn't have the ability to store SRM in a non-volatile memory.  And since
the kernel cannot write to the storage directly, we need usermode to facilitate
this

As per spec the SRM needs to be persistent so this interface is to be
called by the usermode anytime the system goes down/powers on

*boot/resume: load from storage
*shutdown/suspend: save to storage

[How]
Provide a sysfs interface so that the usermode can set/get srm at the right times

save to storage: call "cat /sys/class/drm/card0/device/hdcp_srm > file" after boot and resume
	-driver calls psp_get_srm() to get the stored srm and outputs it

load from storage: call "cat file > /sys/class/drm/card0/device/hdcp_srm" before shutdown and suspend
	-driver reads the file from sysfs and calls psp_set_srm() to send the SRM to PSP

v2:
-update commit description
-add comment about sysfs file handling in the code

v3:
- squash in use after free fix (Dan Carpenter)

Signed-off-by: Bhawanpreet Lakha 
Reviewed-by: Rodrigo Siqueira 
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amd/display: Pass amdgpu_device instead of psp_context

2020-02-05T04:30:40+00:00

[Why]
We need this to create sysfs (followup patch)

[How]
Change the parameter

Signed-off-by: Bhawanpreet Lakha 
Reviewed-by: Rodrigo Siqueira 
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amd/display: add force Type0/1 flag

2019-11-19T15:12:53+00:00

[Why]
Before we had a disable_type1 flag, this forced HDCP 2.2 to type0
There was no way to force type1.

[How]
Remove disable_type1 flag and instead add a flag to force type0/1.

Signed-off-by: Bhawanpreet Lakha 
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher

drm/amd/display: Refactor HDCP to handle multiple displays per link

2019-11-19T15:12:53+00:00

[Why]
We need to do this to support HDCP over MST

Currently we save a display per link, in a MST case we need to save
multiple displays per link.

[How]
We can create an array per link to cache the displays, but it
complicates the design. Instead we can use the module to cache the
displays.

Now we will always add all the displays to the module, but we use the
adjustment flag to disable hdcp on all of them before they are added.

When we want to enable hdcp we just query the display(cache), remove
it then add it back with different adjustments. Its the similar for
disable.

Signed-off-by: Bhawanpreet Lakha 
Reviewed-by: Harry Wentland 
Signed-off-by: Alex Deucher