linux-stable.git/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c, branch v6.2

drm/amdgpu: Move the mutex_lock to protect the return status of securedisplay command buffer

2022-10-27T19:12:08+00:00

[Why]
Before we call psp_securedisplay_invoke(), we call
psp_prep_securedisplay_cmd_buf() to prepare and initialize the command
buffer.

However, we didn't use the mutex_lock to protect the status of command
buffer. So when multiple threads are using the command buffer, after
thread A return from psp_securedisplay_invoke() and the command buffer
status is set to SUCCESS, another thread B may call
psp_prep_securedisplay_cmd_buf() and initialize the status to FAILURE
again, and cause Thread A to get a failure return status.

[How]
Move the mutex_lock out of psp_securedisplay_invoke() to its caller to
cover psp_prep_securedisplay_cmd_buf() and the code checking the return
status of command buffer.

Signed-off-by: Alan Liu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher

drm/amd/display: Drop struct crc_region and reuse struct rect

2022-10-27T18:42:40+00:00

[Why]
reuse struct rect rather than adding a new struct.

[How]
- Userspace keeps inputting x_start, y_start, x_end, y_end
- We translate data to x, y, width, height in code flow to store
- translate back to x_start, y_start, x_end, y_end before programming HW

Tested-by: Mark Broadworth 
Reviewed-by: Wayne Lin 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alan Liu 
Signed-off-by: Alex Deucher

drm/amd/display: Implement secure display on DCN21

2022-10-27T18:42:32+00:00

[Why]
Porting secure display feature from DCN10 to DCN21. Support single
display for now and will extend to multiple displays.

[How]
- use workqueue to offload works for dmub or dmcu firmware
- after receiving ROI update from userspace, set skip_frame_cnt to 1
- refactor amdgpu_dm_crtc_handle_crc_window_irq()
- disable PSR before activating secure_display on a crtc
- check if secure_display is activated before enabling psr
- only work for single display for now.

Tested-by: Mark Broadworth 
Reviewed-by: Wayne Lin 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alan Liu 
Signed-off-by: Alex Deucher

drm/amd/display: add connector type check for CRC source set

2021-12-01T22:08:47+00:00

[Why]
IGT bypass test will set crc source as DPRX,and display DM didn`t check
connection type, it run the test on the HDMI connector ,then the kernel
will be crashed because aux->transfer is set null for HDMI connection.
This patch will skip the invalid connection test and fix kernel crash issue.

[How]
Check the connector type while setting the pipe crc source as DPRX or
auto,if the type is not DP or eDP, the crtc crc source will not be set
and report error code to IGT test,IGT will show the this subtest as no
valid crtc/connector combinations found.

116.779714] [IGT] amd_bypass: starting subtest 8bpc-bypass-mode
[ 117.730996] BUG: kernel NULL pointer dereference, address: 0000000000000000
[ 117.731001] #PF: supervisor instruction fetch in kernel mode
[ 117.731003] #PF: error_code(0x0010) - not-present page
[ 117.731004] PGD 0 P4D 0
[ 117.731006] Oops: 0010 [#1] SMP NOPTI
[ 117.731009] CPU: 11 PID: 2428 Comm: amd_bypass Tainted: G OE 5.11.0-34-generic #36~20.04.1-Ubuntu
[ 117.731011] Hardware name: AMD CZN/, BIOS AB.FD 09/07/2021
[ 117.731012] RIP: 0010:0x0
[ 117.731015] Code: Unable to access opcode bytes at RIP 0xffffffffffffffd6.
[ 117.731016] RSP: 0018:ffffa8d64225bab8 EFLAGS: 00010246
[ 117.731017] RAX: 0000000000000000 RBX: 0000000000000020 RCX: ffffa8d64225bb5e
[ 117.731018] RDX: ffff93151d921880 RSI: ffffa8d64225bac8 RDI: ffff931511a1a9d8
[ 117.731022] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 117.731023] CR2: ffffffffffffffd6 CR3: 000000010d5a4000 CR4: 0000000000750ee0
[ 117.731023] PKRU: 55555554
[ 117.731024] Call Trace:
[ 117.731027] drm_dp_dpcd_access+0x72/0x110 [drm_kms_helper]
[ 117.731036] drm_dp_dpcd_read+0xb7/0xf0 [drm_kms_helper]
[ 117.731040] drm_dp_start_crc+0x38/0xb0 [drm_kms_helper]
[ 117.731047] amdgpu_dm_crtc_set_crc_source+0x1ae/0x3e0 [amdgpu]
[ 117.731149] crtc_crc_open+0x174/0x220 [drm]
[ 117.731162] full_proxy_open+0x168/0x1f0
[ 117.731165] ? open_proxy_open+0x100/0x100

BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1546
Reviewed-by: Harry Wentland 
Reviewed-by: Rodrigo Siqueira 
Signed-off-by: Perry Yuan 
Signed-off-by: Alex Deucher

drm/amd/display: Avoid get/put vblank when stream disabled

2021-05-20T02:39:28+00:00

[Why]
amdgpu_dm_crtc_set_crc_source() will call
amdgpu_dm_crtc_configure_crc_source() to enable/disable CRC
generation. However, configuration will be deferred to stream enabled.
If stream is not enabled, current flow will still try to get/put vblank
refcount.

[How]
Return EINVAL to skip actions on vblank refcount when stream is not
enabled.

Signed-off-by: Wayne Lin 
Reviewed-by: Chao-kai Wang 
Acked-by: Stylon Wang 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Refactor suspend/resume of Secure display

2021-05-20T02:39:16+00:00

[Why]
Once set ROI and do suspend/resume, current flow will not enable
OTG_CRC_CTL again due to we'll defer crc configuration when stream
is enabled.

[How]
Remove current suspend/resume function and have logic implemented into
amdgpu_dm_atomic_commit_tail()

Signed-off-by: Wayne Lin 
Reviewed-by: Chao-kai Wang 
Acked-by: Stylon Wang 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: use MST downstream AUX to dump DPRX CRCs

2021-04-09T20:51:35+00:00

[why]
     In MST setup, we'd use MST downstream AUX to
     dump the DPRX CRCs from sink device.

[how]
     Assign the mst_port->aux to read DPCD registers.

Signed-off-by: David (Dingchen) Zhang 
Reviewed-by: Harry Wentland 
Acked-by: Qingqing Zhuo 
Signed-off-by: Alex Deucher

drm/amd/display: Fix secure display lock problems

2021-03-24T03:32:50+00:00

[Why]
Find out few locks problems while doing secure display. They are
following few parts:

1. crc_rd_work_lock in amdgpu_dm_crtc_handle_crc_window_irq() should
also use spin_lock_irqsave instead of spin_lock_irq.

2. In crc_win_update_set(), crc_rd_work_lock should be grabbed after
obtaining lock event_lock. Otherwise, will cause deadlock by conflicting
the lock order in amdgpu_dm_crtc_handle_crc_window_irq()

3. flush_work() in crc_win_update_set() is no need and will cause
deadlock since amdgpu_dm_crtc_notify_ta_to_read() also tries to grab
lock crc_rd_work_lock.

[How]
Fix above problems.

Tested-by: Daniel Wheeler 
Signed-off-by: Wayne Lin 
Reviewed-by: Solomon Chiu 
Signed-off-by: Alex Deucher

drm/amd/display: Use PSP TA to read out crc

2021-03-05T20:12:09+00:00

[Why & How]
To read back crc by sending command READ_ROI_CRC to
PSP TA to ask it to read out crc of crc window.

Signed-off-by: Wayne Lin 
Reviewed-by: Nicholas Kazlauskas 
Acked-by: Eryk Brol 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher

drm/amd/display: Change to set crc window by dmcu fw

2021-03-05T20:12:01+00:00

[Why & How]
To have crc window being unchanged, we have dmcu to keep monitoring crc
window registers. In order not to have driver and dmcu change crc
registers at the same time, have work of changing crc window to be done
by dmcu fw.

Signed-off-by: Wayne Lin 
Reviewed-by: Nicholas Kazlauskas 
Acked-by: Eryk Brol 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher