<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h, branch v5.2</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>drm/amdkfd: Make the number of SDMA queues variable</title>
<updated>2018-09-27T02:09:16+00:00</updated>
<author>
<name>Shaoyun Liu</name>
<email>Shaoyun.Liu@amd.com</email>
</author>
<published>2018-02-09T21:29:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d50941892ed9d18792271b2b06c8842a7a14b54d'/>
<id>d50941892ed9d18792271b2b06c8842a7a14b54d</id>
<content type='text'>
Vega20 supports 8 SDMA queues per engine

Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Vega20 supports 8 SDMA queues per engine

Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Add wavefront context save state retrieval ioctl</title>
<updated>2018-09-27T02:09:15+00:00</updated>
<author>
<name>Jay Cornwall</name>
<email>Jay.Cornwall@amd.com</email>
</author>
<published>2017-05-02T22:39:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=5df099e8bc83f4f3af8711ee0b9b8faef359ffff'/>
<id>5df099e8bc83f4f3af8711ee0b9b8faef359ffff</id>
<content type='text'>
Wavefront context save data is of interest to userspace clients for
debugging static wavefront state. The MQD contains two parameters
required to parse the control stack and the control stack itself
is kept in the MQD from gfx9 onwards.

Add an ioctl to fetch the context save area and control stack offsets
and to copy the control stack to a userspace address if it is kept in
the MQD.

Signed-off-by: Jay Cornwall &lt;Jay.Cornwall@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Wavefront context save data is of interest to userspace clients for
debugging static wavefront state. The MQD contains two parameters
required to parse the control stack and the control stack itself
is kept in the MQD from gfx9 onwards.

Add an ioctl to fetch the context save area and control stack offsets
and to copy the control stack to a userspace address if it is kept in
the MQD.

Signed-off-by: Jay Cornwall &lt;Jay.Cornwall@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Make SDMA engine number an ASIC-dependent variable</title>
<updated>2018-07-13T20:17:44+00:00</updated>
<author>
<name>Yong Zhao</name>
<email>yong.zhao@amd.com</email>
</author>
<published>2018-07-13T20:17:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=98bb92222eef6ac022f352aa4224f4c94a119199'/>
<id>98bb92222eef6ac022f352aa4224f4c94a119199</id>
<content type='text'>
On Raven there is only one SDMA engine instead of previously assumed two,
so we need to adapt our code to this new scenario.

Signed-off-by: Yong Zhao &lt;yong.zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On Raven there is only one SDMA engine instead of previously assumed two,
so we need to adapt our code to this new scenario.

Signed-off-by: Yong Zhao &lt;yong.zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Replace mqd with mqd_mgr as the variable name for mqd_manager</title>
<updated>2018-07-12T02:33:07+00:00</updated>
<author>
<name>Yong Zhao</name>
<email>yong.zhao@amd.com</email>
</author>
<published>2018-07-12T02:33:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8d5f355290880331e265d4c3f3b66c805969f18e'/>
<id>8d5f355290880331e265d4c3f3b66c805969f18e</id>
<content type='text'>
This will make reading code much easier.

Signed-off-by: Yong Zhao &lt;yong.zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This will make reading code much easier.

Signed-off-by: Yong Zhao &lt;yong.zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Implement hang detection in KFD and call amdgpu</title>
<updated>2018-07-12T02:32:58+00:00</updated>
<author>
<name>Shaoyun Liu</name>
<email>Shaoyun.Liu@amd.com</email>
</author>
<published>2018-07-12T02:32:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=73ea648d921ed5c58895c8592321456fe12b697f'/>
<id>73ea648d921ed5c58895c8592321456fe12b697f</id>
<content type='text'>
The reset will be performed in a new hw_exception work thread to
handle HWS hang without blocking the thread that detected the hang.

Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The reset will be performed in a new hw_exception work thread to
handle HWS hang without blocking the thread that detected the hang.

Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Reliably prevent reclaim-FS while holding DQM lock</title>
<updated>2018-07-12T02:32:44+00:00</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2018-07-12T02:32:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=efeaed4d98eb4dc9ce01e1dca6d3778d180b272c'/>
<id>efeaed4d98eb4dc9ce01e1dca6d3778d180b272c</id>
<content type='text'>
This is needed to prevent deadlocks when MMU notifiers run in
reclaim-FS context and take the DQM lock for userptr evictions.
Previously this was done by making all memory allocations under
DQM locks GFP_NOIO. This is error prone. Using
memalloc_nofs_save/restore will reliably affect all memory
allocations anywhere in the kernel while the DQM lock is held.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is needed to prevent deadlocks when MMU notifiers run in
reclaim-FS context and take the DQM lock for userptr evictions.
Previously this was done by making all memory allocations under
DQM locks GFP_NOIO. This is error prone. Using
memalloc_nofs_save/restore will reliably affect all memory
allocations anywhere in the kernel while the DQM lock is held.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Add GFXv9 device queue manager</title>
<updated>2018-04-10T21:33:09+00:00</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2018-04-10T21:33:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=bed4f110251b4f9041e5e797e035bc40c34d60ea'/>
<id>bed4f110251b4f9041e5e797e035bc40c34d60ea</id>
<content type='text'>
Signed-off-by: John Bridgman &lt;john.bridgman@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: John Bridgman &lt;john.bridgman@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Implement KFD process eviction/restore</title>
<updated>2018-02-07T01:32:45+00:00</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2018-02-07T01:32:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=26103436da003327017af325483b6150a3b855cc'/>
<id>26103436da003327017af325483b6150a3b855cc</id>
<content type='text'>
When the TTM memory manager in KGD evicts BOs, all user mode queues
potentially accessing these BOs must be evicted temporarily. Once
user mode queues are evicted, the eviction fence is signaled,
allowing the migration of the BO to proceed.

A delayed worker is scheduled to restore all the BOs belonging to
the evicted process and restart its queues.

During suspend/resume of the GPU we also evict all processes to allow
KGD to save BOs in system memory, since VRAM will be lost.

v2:
* Account for eviction when updating of q-&gt;is_active in MQD manager

Signed-off-by: Harish Kasiviswanathan &lt;Harish.Kasiviswanathan@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When the TTM memory manager in KGD evicts BOs, all user mode queues
potentially accessing these BOs must be evicted temporarily. Once
user mode queues are evicted, the eviction fence is signaled,
allowing the migration of the BO to proceed.

A delayed worker is scheduled to restore all the BOs belonging to
the evicted process and restart its queues.

During suspend/resume of the GPU we also evict all processes to allow
KGD to save BOs in system memory, since VRAM will be lost.

v2:
* Account for eviction when updating of q-&gt;is_active in MQD manager

Signed-off-by: Harish Kasiviswanathan &lt;Harish.Kasiviswanathan@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Add dGPU support to the device queue manager</title>
<updated>2018-01-04T22:17:44+00:00</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2018-01-04T22:17:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=97672cbe3de809ef8c4ea66cce675f5da3d3df44'/>
<id>97672cbe3de809ef8c4ea66cce675f5da3d3df44</id>
<content type='text'>
GFXv7 and v8 dGPUs use a different addressing mode for KFD compared
to APUs (GPUVM64 vs HSA64). And dGPUs don't support MTYPE_CC. They
use MTYPE_UC instead for memory that requires coherency.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
GFXv7 and v8 dGPUs use a different addressing mode for KFD compared
to APUs (GPUVM64 vs HSA64). And dGPUs don't support MTYPE_CC. They
use MTYPE_UC instead for memory that requires coherency.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdkfd: Make sched_policy a per-device setting</title>
<updated>2018-01-04T22:17:43+00:00</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2018-01-04T22:17:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d146c5a7196b4c2c2586569971a55392b501b93b'/>
<id>d146c5a7196b4c2c2586569971a55392b501b93b</id>
<content type='text'>
Some dGPUs don't support HWS. Allow them to use a per-device
sched_policy that may be different from the global default.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some dGPUs don't support HWS. Allow them to use a per-device
sched_policy that may be different from the global default.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
