linux-stable.git/drivers/gpu/drm/amd/amdgpu/nv.c, branch v5.11 Linux kernel stable tree drm/amdgpu: set mode1 reset as default for dimgrey_cavefish 2020-12-16T18:27:17+00:00 Tao Zhou tao.zhou1@amd.com 2020-12-15T10:04:04+00:00 15ed44c0e7129a0967157f7b349e1b3feb26a534 Use mode1 reset for dimgrey_cavefish by default. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Use mode1 reset for dimgrey_cavefish by default.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/sriov: reopen sienna_child smu ip block under sriov 2020-11-16T17:18:25+00:00 Jane Jian Jane.Jian@amd.com 2020-10-16T07:54:59+00:00 acf2740f12860456869711edfe83f658f2a1facb open smu ip block meets with one-vf mode need Signed-off-by: Jane Jian <Jane.Jian@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
open smu ip block meets with one-vf mode need

Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: enable DCN for navi10 headless SKU 2020-11-10T19:24:30+00:00 Tianci.Yin tianci.yin@amd.com 2020-11-06T06:56:35+00:00 8301f6b990ada8f5e9b23ed7d4a0d60b00d49238 There is a NULL pointer crash when DCN disabled on headless SKU. On normal SKU, the variable adev->ddev.mode_config.funcs is initialized in dm_hw_init(), and it is fine to access it in amdgpu_device_resume(). But on headless SKU, DCN is disabled, the funcs variable is not initialized, then crash arises. Enable DCN to fix this issue. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
There is a NULL pointer crash when DCN disabled on headless SKU.
On normal SKU, the variable adev->ddev.mode_config.funcs is
initialized in dm_hw_init(), and it is fine to access it in
amdgpu_device_resume(). But on headless SKU, DCN is disabled,
the funcs variable is not initialized, then crash arises.
Enable DCN to fix this issue.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Enable FGCG for Vangogh 2020-11-04T22:08:36+00:00 Jinzhou.Su Jinzhou.Su@amd.com 2020-11-03T06:01:59+00:00 a3964ec40fc12a37bb2f0c3694453c8be9f582ef Add flags AMD_CG_SUPPORT_GFX_FGCG for Vangogh Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add flags AMD_CG_SUPPORT_GFX_FGCG for Vangogh

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu: Add mmhub MGCG and MGLS for vangogh 2020-11-02T20:32:58+00:00 Jinzhou.Su Jinzhou.Su@amd.com 2020-10-30T06:52:46+00:00 0ebce667e881712a9aaae8fe48bfea07af7be133 Add AMD_CG_SUPPORT_MC_MGCG and AMD_CG_SUPPORT_MC_LS Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add AMD_CG_SUPPORT_MC_MGCG and AMD_CG_SUPPORT_MC_LS

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu: Add GFX MGCG and MGLS for vangogh 2020-10-30T04:58:50+00:00 Jinzhou.Su Jinzhou.Su@amd.com 2020-10-27T13:37:49+00:00 51a7e93826a05deb85db07f58cad7e97e4165e77 add GFX Medium Grain Light Sleep support for vangogh add AMD_CG_SUPPORT_GFX_CP_LS and AMD_CG_SUPPORT_GFX_RLC_LS v2: add GFX Medium Grain Clock Gating Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
add GFX Medium Grain Light Sleep support for vangogh

add AMD_CG_SUPPORT_GFX_CP_LS and AMD_CG_SUPPORT_GFX_RLC_LS

v2:
  add GFX Medium Grain Clock Gating

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: rename nv_is_headless_sku() 2020-10-30T04:57:11+00:00 Flora Cui flora.cui@amd.com 2020-10-28T06:04:29+00:00 9c94b5ef75b5e5144829cd4e74ba55771613b71f for headless NAVI ASICs Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
for headless NAVI ASICs

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKU 2020-10-30T04:57:03+00:00 Flora Cui flora.cui@amd.com 2020-10-27T06:58:19+00:00 dd657888e00ebc9a3f7a98fe155dcc597939a358 Navi14 0x7340/C9 SKU has no display and video support, remove them. Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Navi14 0x7340/C9 SKU has no display and video support, remove them.

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add vangogh apu flag 2020-10-27T16:01:29+00:00 Huang Rui ray.huang@amd.com 2020-10-26T12:43:41+00:00 c345c89b64914ec701a25036ecc734c0201d4a7c This patch is to add vangogh apu flag to support more kickers that belongs vangogh series. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
This patch is to add vangogh apu flag to support more kickers that
belongs vangogh series.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: enable IP discovery for vangogh 2020-10-26T17:26:16+00:00 Xiaomeng Hou Xiaomeng.Hou@amd.com 2020-10-23T07:39:53+00:00 0165b85c278415d90fa8e439ab54e27d23663112 enable IP discovery for vangogh. Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
enable IP discovery for vangogh.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>