linux-stable.git/drivers/gpu/drm/amd/amdgpu/nv.c, branch linux-5.14.y Linux kernel stable tree drm/amdgpu: support B0&B1 external revision id for yellow carp 2021-11-02T18:50:55+00:00 Aaron Liu aaron.liu@amd.com 2021-10-19T03:13:25+00:00 c3ae5cf3e3ee2bc250371e3fabb51ba7fbbfba52 commit 53c2ff8bcb06acd07e24a62e7f5a0247bd7c6f67 upstream. B0 internal rev_id is 0x01, B1 internal rev_id is 0x02. The external rev_id for B0 and B1 is 0x20. The original expression is not suitable for B1. v2: squash in fix for display code (Alex) Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
commit 53c2ff8bcb06acd07e24a62e7f5a0247bd7c6f67 upstream.

B0 internal rev_id is 0x01, B1 internal rev_id is 0x02.
The external rev_id for B0 and B1 is 0x20.
The original expression is not suitable for B1.

v2: squash in fix for display code (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drm/amdgpu - Corrected the video codecs array name for yellow carp 2021-07-21T21:47:28+00:00 Veerabadhran Gopalakrishnan veerabadhran.gopalakrishnan@amd.com 2021-07-19T13:36:23+00:00 d80cded9cc25f841d5250d2e94a7b42be1e81c97 Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: update yellow carp external rev_id handling 2021-07-21T18:37:33+00:00 Aaron Liu aaron.liu@amd.com 2021-06-02T02:32:41+00:00 ab7a11bd36ca6cd4d4dab2846eaacafaa5963cc1 0x1681 has a different external revision id. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
0x1681 has a different external revision id.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu/nv.c - Optimize code for video codec support structure 2021-07-16T18:17:05+00:00 Veerabadhran Gopalakrishnan veerabadhran.gopalakrishnan@amd.com 2021-07-13T17:51:43+00:00 6505d6fcc616472c1b4d6298beacf52673c7b072 Optimized the code for codec info structure initialization Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Optimized the code for codec info structure initialization

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu/nv.c - Added video codec support for Yellow Carp 2021-07-16T18:16:57+00:00 Veerabadhran Gopalakrishnan veerabadhran.gopalakrishnan@amd.com 2021-07-09T07:30:11+00:00 ea272ce46f3c86d15d9b58bd4d8d44de6cee04b7 Added the supported codecs in the video capabilities query. Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Added the supported codecs in the video capabilities query.

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move apu flags initialization to the start of device init 2021-07-01T04:05:18+00:00 Huang Rui ray.huang@amd.com 2021-06-22T09:33:54+00:00 9f6a78572033b9c35268387630353fa1bdee0320 In some asics, we need to adjust the behavior according to the apu flags at very early stage. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
In some asics, we need to adjust the behavior according to the apu flags
at very early stage.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu/nv.c - Added codec query for Beige Goby 2021-06-30T04:18:23+00:00 Veerabadhran Gopalakrishnan veerabadhran.gopalakrishnan@amd.com 2021-06-18T18:40:46+00:00 b3a24461f9fb1579c3335c63d1e039bc5a6eda53 Added the Beige Goby capabilities in codec query. v2: fix build error and indent (James) Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Added the Beige Goby capabilities in codec query.

v2: fix build error and indent (James)

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: fix the hang caused by PCIe link width switch 2021-06-30T04:18:14+00:00 Evan Quan evan.quan@amd.com 2021-05-25T06:36:29+00:00 adcf949e664a8b04df2fb8aa916892e58561653c SMU had set all the necessary fields for a link width switch but the width switch wasn't occurring because the link was idle in the L1 state. Setting LC_L1_RECONFIG_EN=0x1 will allow width switches to also be initiated while in L1 instead of waiting until the link is back in L0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org 
SMU had set all the necessary fields for a link width switch
but the width switch wasn't occurring because the link was idle
in the L1 state. Setting LC_L1_RECONFIG_EN=0x1 will allow width
switches to also be initiated while in L1 instead of waiting until
the link is back in L0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drm/amdgpu: fix NAK-G generation during PCI-e link width switch 2021-06-30T04:17:56+00:00 Evan Quan evan.quan@amd.com 2021-05-25T04:08:53+00:00 5a5da8ae9546031e43efd4fa5aa8baa481e83dfb A lot of NAK-G being generated when link widht switching is happening. WA for this issue is to program the SPC to 4 symbols per clock during bootup when the native PCIE width is x4. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org 
A lot of NAK-G being generated when link widht switching is happening.
WA for this issue is to program the SPC to 4 symbols per clock during
bootup when the native PCIE width is x4.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drm/amdgpu: Add DC support and display block for Yellow Carp 2021-06-04T20:39:19+00:00 Nicholas Kazlauskas nicholas.kazlauskas@amd.com 2021-05-19T16:57:17+00:00 c8b73f7fdbb117bc839559a8e8f495b700f043af To enable output on real display instead of virtual. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
To enable output on real display instead of virtual.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>