<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c, branch v7.3-rc2</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>drm/amdgpu: Update queue reset support version</title>
<updated>2026-09-02T20:32:47+00:00</updated>
<author>
<name>Amber Lin</name>
<email>amber.lin@amd.com</email>
</author>
<published>2026-08-27T19:02:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b428f83c7c2542837c15231c519583cc26b60156'/>
<id>b428f83c7c2542837c15231c519583cc26b60156</id>
<content type='text'>
Update queue reset required MES version for MES 12.1 to 0x7b since we
change the implementation from detect-and-reset method to
per-queue-reset method.

Signed-off-by: Amber Lin &lt;amber.lin@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 2160a5cbf0b7917adce4b55421306b614b4a2c8f)
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update queue reset required MES version for MES 12.1 to 0x7b since we
change the implementation from detect-and-reset method to
per-queue-reset method.

Signed-off-by: Amber Lin &lt;amber.lin@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 2160a5cbf0b7917adce4b55421306b614b4a2c8f)
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: tear down the rs64mem bitmap in sw_fini</title>
<updated>2026-08-06T16:45:41+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-08-04T07:39:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7195f75e80759d4bb7a59bd79b7ff9153e63e498'/>
<id>7195f75e80759d4bb7a59bd79b7ff9153e63e498</id>
<content type='text'>
It's more reasonable to tear down the rs64mem bitmap software
context at MES sw_fini phase. This also can avoid the following
lock order issue.

[ 2529.150983] kworker/u64:1/3134 is trying to acquire lock:
[ 2529.151206] ffff8aebd9a3fa10 (reservation_ww_class_mutex){+.+.}-{4:4}, at: amdgpu_bo_free_kernel+0x4e/0x130 [amdgpu]
[ 2529.151989]
               but task is already holding lock:
[ 2529.152227] ffff8aebd2411648 (&amp;reset_domain-&gt;sem){++++}-{4:4}, at: amdgpu_device_lock_reset_domain+0x20/0x30 [amdgpu]
[ 2529.153008]
               which lock already depends on the new lock.

[ 2529.153342]
               the existing dependency chain (in reverse order) is:
[ 2529.153645]
               -&gt; #2 (&amp;reset_domain-&gt;sem){++++}-{4:4}:
[ 2529.153913]        down_read+0x4a/0x240
[ 2529.154081]        amdgpu_userq_destroy+0xd8/0x3a0 [amdgpu]
[ 2529.154635]        amdgpu_userq_ioctl+0x3e2/0xe30 [amdgpu]
[ 2529.155157]        drm_ioctl_kernel+0xaf/0x110 [drm]
[ 2529.155401]        drm_ioctl+0x290/0x510 [drm]
[ 2529.155612]        amdgpu_drm_ioctl+0x52/0x90 [amdgpu]
[ 2529.156068]        __x64_sys_ioctl+0xa0/0xf0
[ 2529.156249]        x64_sys_call+0x1278/0x21c0
[ 2529.156434]        do_syscall_64+0xbe/0x5f0
[ 2529.156611]        entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 2529.156842]
               -&gt; #1 (&amp;userq_mgr-&gt;userq_mutex){+.+.}-{4:4}:
[ 2529.157127]        __mutex_lock+0xb2/0x11a0
[ 2529.157304]        mutex_lock_nested+0x1f/0x30
[ 2529.157492]        amdgpu_userq_vm_validate_and_restore_queue+0x710/0x9b0 [amdgpu]
[ 2529.158098]        amdgpu_userq_restore_worker+0x39/0x290 [amdgpu]
[ 2529.158646]        process_one_work+0x23e/0x6f
               -&gt; #0 (reservation_ww_class_mutex){+.+.}-{4:4}:
[ 2529.159832]        __lock_acquire+0x14c4/0x2210
[ 2529.160021]        lock_acquire+0xc6/0x310
[ 2529.160193]        __ww_mutex_lock.constprop.0+0xd9/0x1a30
[ 2529.160419]        ww_mutex_lock+0x40/0xb0
[ 2529.160590]        amdgpu_bo_free_kernel+0x4e/0x130 [amdgpu]
[ 2529.161077]        amdgpu_mes_rs64mem_fini+0x35/0x60 [amdgpu]
[ 2529.161601]        mes_v11_0_suspend+0x2d/0x40 [amdgpu]
[ 2529.162102]        amdgpu_ip_block_suspend+0x2b/0x70 [amdgpu]
[ 2529.162609]        amdgpu_device_ip_suspend_phase2+0xa4/0x270 [amdgpu]
[ 2529.163116]        amdgpu_device_pre_asic_reset+0x130/0x1f0 [amdgpu]
[ 2529.163617]        amdgpu_device_asic_reset+0x55/0x530 [amdgpu]
[ 2529.164101]        amdgpu_device_gpu_recover+0x1e5/0x410 [amdgpu]
[ 2529.164592]        amdgpu_userq_mgr_reset_work+0x80/0xa0 [amdgpu]
[ 2529.165140]        amdgpu_userq_hang_detect_work+0xbb/0x1c0 [amdgpu]
[ 2529.165693]        process_one_work+0x23e/0x6f0
[ 2529.165884]        worker_thread+0x1c4/0x380
[ 2529.166065]        kthread+0x10c/0x150
[ 2529.166226]        ret_from_fork+0x314/0x390
[ 2529.166408]        ret_from_fork_asm+0x1a/0x30
[ 2529.166595]
               other info that might help us debug this:

[ 2529.166917] Chain exists of:
                 reservation_ww_class_mutex --&gt; &amp;userq_mgr-&gt;userq_mutex --&gt; &amp;reset_domain-&gt;sem

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It's more reasonable to tear down the rs64mem bitmap software
context at MES sw_fini phase. This also can avoid the following
lock order issue.

[ 2529.150983] kworker/u64:1/3134 is trying to acquire lock:
[ 2529.151206] ffff8aebd9a3fa10 (reservation_ww_class_mutex){+.+.}-{4:4}, at: amdgpu_bo_free_kernel+0x4e/0x130 [amdgpu]
[ 2529.151989]
               but task is already holding lock:
[ 2529.152227] ffff8aebd2411648 (&amp;reset_domain-&gt;sem){++++}-{4:4}, at: amdgpu_device_lock_reset_domain+0x20/0x30 [amdgpu]
[ 2529.153008]
               which lock already depends on the new lock.

[ 2529.153342]
               the existing dependency chain (in reverse order) is:
[ 2529.153645]
               -&gt; #2 (&amp;reset_domain-&gt;sem){++++}-{4:4}:
[ 2529.153913]        down_read+0x4a/0x240
[ 2529.154081]        amdgpu_userq_destroy+0xd8/0x3a0 [amdgpu]
[ 2529.154635]        amdgpu_userq_ioctl+0x3e2/0xe30 [amdgpu]
[ 2529.155157]        drm_ioctl_kernel+0xaf/0x110 [drm]
[ 2529.155401]        drm_ioctl+0x290/0x510 [drm]
[ 2529.155612]        amdgpu_drm_ioctl+0x52/0x90 [amdgpu]
[ 2529.156068]        __x64_sys_ioctl+0xa0/0xf0
[ 2529.156249]        x64_sys_call+0x1278/0x21c0
[ 2529.156434]        do_syscall_64+0xbe/0x5f0
[ 2529.156611]        entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 2529.156842]
               -&gt; #1 (&amp;userq_mgr-&gt;userq_mutex){+.+.}-{4:4}:
[ 2529.157127]        __mutex_lock+0xb2/0x11a0
[ 2529.157304]        mutex_lock_nested+0x1f/0x30
[ 2529.157492]        amdgpu_userq_vm_validate_and_restore_queue+0x710/0x9b0 [amdgpu]
[ 2529.158098]        amdgpu_userq_restore_worker+0x39/0x290 [amdgpu]
[ 2529.158646]        process_one_work+0x23e/0x6f
               -&gt; #0 (reservation_ww_class_mutex){+.+.}-{4:4}:
[ 2529.159832]        __lock_acquire+0x14c4/0x2210
[ 2529.160021]        lock_acquire+0xc6/0x310
[ 2529.160193]        __ww_mutex_lock.constprop.0+0xd9/0x1a30
[ 2529.160419]        ww_mutex_lock+0x40/0xb0
[ 2529.160590]        amdgpu_bo_free_kernel+0x4e/0x130 [amdgpu]
[ 2529.161077]        amdgpu_mes_rs64mem_fini+0x35/0x60 [amdgpu]
[ 2529.161601]        mes_v11_0_suspend+0x2d/0x40 [amdgpu]
[ 2529.162102]        amdgpu_ip_block_suspend+0x2b/0x70 [amdgpu]
[ 2529.162609]        amdgpu_device_ip_suspend_phase2+0xa4/0x270 [amdgpu]
[ 2529.163116]        amdgpu_device_pre_asic_reset+0x130/0x1f0 [amdgpu]
[ 2529.163617]        amdgpu_device_asic_reset+0x55/0x530 [amdgpu]
[ 2529.164101]        amdgpu_device_gpu_recover+0x1e5/0x410 [amdgpu]
[ 2529.164592]        amdgpu_userq_mgr_reset_work+0x80/0xa0 [amdgpu]
[ 2529.165140]        amdgpu_userq_hang_detect_work+0xbb/0x1c0 [amdgpu]
[ 2529.165693]        process_one_work+0x23e/0x6f0
[ 2529.165884]        worker_thread+0x1c4/0x380
[ 2529.166065]        kthread+0x10c/0x150
[ 2529.166226]        ret_from_fork+0x314/0x390
[ 2529.166408]        ret_from_fork_asm+0x1a/0x30
[ 2529.166595]
               other info that might help us debug this:

[ 2529.166917] Chain exists of:
                 reservation_ww_class_mutex --&gt; &amp;userq_mgr-&gt;userq_mutex --&gt; &amp;reset_domain-&gt;sem

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: refactor the amdgpu_mes_alloc/free_proc|gang()</title>
<updated>2026-08-06T16:44:50+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-07-28T08:16:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d0827dda8fa7a1b398d7cf41e4c88c314691dcbc'/>
<id>d0827dda8fa7a1b398d7cf41e4c88c314691dcbc</id>
<content type='text'>
- Unify amdgpu_mes_alloc/free_proc|gang_ctx_index to provide
  centralized RS64mem bitmap management for both KGD and KFD.
- Retrieve the bitmap bit for userq contex index based on a
  per process granularity.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Unify amdgpu_mes_alloc/free_proc|gang_ctx_index to provide
  centralized RS64mem bitmap management for both KGD and KFD.
- Retrieve the bitmap bit for userq contex index based on a
  per process granularity.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: Add missing MES helper parameter descriptions</title>
<updated>2026-07-28T22:47:11+00:00</updated>
<author>
<name>Srinivasan Shanmugam</name>
<email>srinivasan.shanmugam@amd.com</email>
</author>
<published>2026-07-19T17:36:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e6ed7d9c391a82d111b705c080c51f8edc059781'/>
<id>e6ed7d9c391a82d111b705c080c51f8edc059781</id>
<content type='text'>
Complete the kernel-doc comments for the MES RS64 memory, process
context, and gang context helper functions by documenting the missing
function parameters to keep the kernel-doc comments consistent with
their function signatures.

Fixes: 56f7ea845e7d ("drm/amdgpu: add RS64 local memory context array init/fini")
Fixes: cf5f98609a03 ("drm/amdgpu: add mes process context alloc/free")
Fixes: 5ab89b491f21 ("drm/amdgpu: add mes gang contex alloc/free helper")
Cc: Prike Liang &lt;Prike.Liang@amd.com&gt;
Cc: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Complete the kernel-doc comments for the MES RS64 memory, process
context, and gang context helper functions by documenting the missing
function parameters to keep the kernel-doc comments consistent with
their function signatures.

Fixes: 56f7ea845e7d ("drm/amdgpu: add RS64 local memory context array init/fini")
Fixes: cf5f98609a03 ("drm/amdgpu: add mes process context alloc/free")
Fixes: 5ab89b491f21 ("drm/amdgpu: add mes gang contex alloc/free helper")
Cc: Prike Liang &lt;Prike.Liang@amd.com&gt;
Cc: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: add mes gang contex alloc/free helper</title>
<updated>2026-07-15T13:15:43+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-07-09T02:42:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=5ab89b491f215f69b750130ead2ff6bbde6c0e2e'/>
<id>5ab89b491f215f69b750130ead2ff6bbde6c0e2e</id>
<content type='text'>
Implement the MES gang contex alloc and free heplers.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Implement the MES gang contex alloc and free heplers.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: add mes process context alloc/free</title>
<updated>2026-07-15T13:15:41+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-07-03T02:25:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=cf5f98609a03d89a32cd0922b092eea66bdb2e77'/>
<id>cf5f98609a03d89a32cd0922b092eea66bdb2e77</id>
<content type='text'>
Those helpers allocates/frees slots from bitmaps for
process_context_array_index processed by MES firmware.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Those helpers allocates/frees slots from bitmaps for
process_context_array_index processed by MES firmware.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: add MES process/gang context size and bitmap helper</title>
<updated>2026-07-15T13:15:41+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-06-30T08:47:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=91d50ffb37dfa2f36893f5b306e72006e638dbe7'/>
<id>91d50ffb37dfa2f36893f5b306e72006e638dbe7</id>
<content type='text'>
Allocating the MES context bitmap to track the process/gang index usage.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Allocating the MES context bitmap to track the process/gang index usage.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: add RS64 local memory context array init/fini</title>
<updated>2026-07-15T13:15:40+00:00</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-06-29T06:47:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=56f7ea845e7d42db1fed48a0ec58fa09b95fabd7'/>
<id>56f7ea845e7d42db1fed48a0ec58fa09b95fabd7</id>
<content type='text'>
Add amdgpu_mes_rs64mem_init() and amdgpu_mes_rs64mem_fini() to
manage the RS64 local memory context arrays used by the MES
scheduler.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add amdgpu_mes_rs64mem_init() and amdgpu_mes_rs64mem_fini() to
manage the RS64 local memory context arrays used by the MES
scheduler.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu: move struct amdgpu_wb and helpers into separate files</title>
<updated>2026-07-08T18:20:30+00:00</updated>
<author>
<name>Shahyan Soltani</name>
<email>shahyan.soltani@amd.com</email>
</author>
<published>2026-06-03T13:23:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=fbf41e05119f43e9d69307272ced4ed3b82ad371'/>
<id>fbf41e05119f43e9d69307272ced4ed3b82ad371</id>
<content type='text'>
Move struct amdgpu_wb and helpers out of the monolithic header amdgpu.h
into its own dedicated header amdgpu_wb.h.

Add amdgpu_wb_init() and amdgpu_wb_fini() into amdgpu_wb.h.

Move functions amdgpu_device_wb_get(), amdgpu_device_wb_free(),
amdgpu_device_wb_init(), and amdgpu_device_wb_fini() out of
amdgpu_device.c into new dedicated amdgpu_wb.c file.

Removed static from functions amdgpu_device_wb_init() and amdgpu_device_wb_fini().

Rename functions amdgpu_device_wb_get(), amdgpu_device_wb_free(),
amdgpu_device_wb_init(), and amdgpu_device_wb_fini() into
amdgpu_wb_get(), amdgpu_wb_free(), amdgpu_wb_init(), and amdgpu_wb_fini().

Update amdgpu/Makefile to build amdgpu_wb.o.

This is part of the ongoing effort to reduce the size of amdgpu.h into
their own respective separate headers.

Signed-off-by: Shahyan Soltani &lt;shahyan.soltani@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move struct amdgpu_wb and helpers out of the monolithic header amdgpu.h
into its own dedicated header amdgpu_wb.h.

Add amdgpu_wb_init() and amdgpu_wb_fini() into amdgpu_wb.h.

Move functions amdgpu_device_wb_get(), amdgpu_device_wb_free(),
amdgpu_device_wb_init(), and amdgpu_device_wb_fini() out of
amdgpu_device.c into new dedicated amdgpu_wb.c file.

Removed static from functions amdgpu_device_wb_init() and amdgpu_device_wb_fini().

Rename functions amdgpu_device_wb_get(), amdgpu_device_wb_free(),
amdgpu_device_wb_init(), and amdgpu_device_wb_fini() into
amdgpu_wb_get(), amdgpu_wb_free(), amdgpu_wb_init(), and amdgpu_wb_fini().

Update amdgpu/Makefile to build amdgpu_wb.o.

This is part of the ongoing effort to reduce the size of amdgpu.h into
their own respective separate headers.

Signed-off-by: Shahyan Soltani &lt;shahyan.soltani@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: Fix hung_queue_db_array loop limit for multi-XCC</title>
<updated>2026-07-08T18:20:29+00:00</updated>
<author>
<name>Geoffrey McRae</name>
<email>geoffrey.mcrae@amd.com</email>
</author>
<published>2026-06-28T05:37:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2c256086a363f01f9840a57949506eccf5c990a6'/>
<id>2c256086a363f01f9840a57949506eccf5c990a6</id>
<content type='text'>
The loop iterated only AMDGPU_MAX_MES_PIPES times, leaving entries
uninitialized for multi-XCC GPUs. This causes null pointer dereferences
when accessing arrays indexed by XCC ID &gt;= 2. Extend the loop to cover
all XCCs (AMDGPU_MAX_MES_PIPES * num_xcc), matching other per-XCC
arrays.

Fixes: a132fc9bc2f8 ("drm/amdgpu: Fixup boost mes detect hang array size")
Signed-off-by: Geoffrey McRae &lt;geoffrey.mcrae@amd.com&gt;
Reviewed-by: Amber Lin &lt;amber.lin@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The loop iterated only AMDGPU_MAX_MES_PIPES times, leaving entries
uninitialized for multi-XCC GPUs. This causes null pointer dereferences
when accessing arrays indexed by XCC ID &gt;= 2. Extend the loop to cover
all XCCs (AMDGPU_MAX_MES_PIPES * num_xcc), matching other per-XCC
arrays.

Fixes: a132fc9bc2f8 ("drm/amdgpu: Fixup boost mes detect hang array size")
Signed-off-by: Geoffrey McRae &lt;geoffrey.mcrae@amd.com&gt;
Reviewed-by: Amber Lin &lt;amber.lin@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
