linux-stable.git/drivers/gpio, branch v6.4.8

gpio: mvebu: fix irq domain leak

2023-08-03T08:25:42+00:00

[ Upstream commit 644ee70267a934be27370f9aa618b29af7290544 ]

Uwe Kleine-König pointed out we still have one resource leak in the mvebu
driver triggered on driver detach. Let's address it with a custom devm
action.

Fixes: 812d47889a8e ("gpio/mvebu: Use irq_domain_add_linear")
Signed-off-by: Bartosz Golaszewski 
Reviewed-by: Andy Shevchenko 
Reviewed-by: Uwe Kleine-König 
Signed-off-by: Sasha Levin

gpio: mvebu: Make use of devm_pwmchip_add

2023-08-03T08:25:42+00:00

[ Upstream commit 1945063eb59e64d2919cb14d54d081476d9e53bb ]

This allows to get rid of a call to pwmchip_remove() in the error path. There
is no .remove function for this driver, so this change fixes a resource leak
when a gpio-mvebu device is unbound.

Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Uwe Kleine-König 
Reviewed-by: Andy Shevchenko 
Signed-off-by: Bartosz Golaszewski 
Signed-off-by: Sasha Levin

gpio: tps68470: Make tps68470_gpio_output() always set the initial value

2023-08-03T08:25:42+00:00

[ Upstream commit 5a7adc6c1069ce31ef4f606ae9c05592c80a6ab5 ]

Make tps68470_gpio_output() call tps68470_gpio_set() for output-only pins
too, so that the initial value passed to gpiod_direction_output() is
honored for these pins too.

Fixes: 275b13a65547 ("gpio: Add support for TPS68470 GPIOs")
Reviewed-by: Andy Shevchenko 
Reviewed-by: Daniel Scally 
Tested-by: Daniel Scally 
Reviewed-by: Sakari Ailus 
Signed-off-by: Hans de Goede 
Signed-off-by: Bartosz Golaszewski 
Signed-off-by: Sasha Levin

ARM/gpio: Push OMAP2 quirk down into TWL4030 driver

2023-07-19T14:35:48+00:00

[ Upstream commit d5f4fa60d63aa54ae33339895b88d8932b6037ed ]

The TWL4030 GPIO driver has a custom platform data .set_up()
callback to call back into the platform and do misc stuff such
as hog and export a GPIO for WLAN PWR on a specific OMAP3 board.

Avoid all the kludgery in the platform data and the boardfile
and just put the quirks right into the driver. Make it
conditional on OMAP3.

I think the exported GPIO is used by some kind of userspace
so ordinary DTS hogs will probably not work.

Fixes: 92bf78b33b0b ("gpio: omap: use dynamic allocation of base")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

gpiolib: Fix irq_domain resource tracking for gpiochip_irqchip_add_domain()

2023-06-19T12:57:38+00:00

Up until commit 6a45b0e2589f ("gpiolib: Introduce
gpiochip_irqchip_add_domain()") all irq_domains were allocated
by gpiolib itself and thus gpiolib also takes care of freeing it.

With gpiochip_irqchip_add_domain() a user of gpiolib can associate an
irq_domain with the gpio_chip. This irq_domain is not managed by
gpiolib and therefore must not be freed by gpiolib.

Fixes: 6a45b0e2589f ("gpiolib: Introduce gpiochip_irqchip_add_domain()")
Reported-by: Jiawen Wu 
Signed-off-by: Michael Walle 
Reviewed-by: Linus Walleij 
Reviewed-by: Andy Shevchenko 
Signed-off-by: Bartosz Golaszewski

gpio: sifive: add missing check for platform_get_irq

2023-06-13T14:22:16+00:00

Add the missing check for platform_get_irq() and return error code
if it fails.

The returned error code will be dealed with in
builtin_platform_driver(sifive_gpio_driver) and the driver will not
be registered.

Fixes: f52d6d8b43e5 ("gpio: sifive: To get gpio irq offset from device tree data")
Signed-off-by: Jiasheng Jiang 
Signed-off-by: Bartosz Golaszewski

gpiolib: Fix GPIO chip IRQ initialization restriction

2023-06-13T12:40:41+00:00

In case of gpio-regmap, IRQ chip is added by regmap-irq and associated with
GPIO chip by gpiochip_irqchip_add_domain(). The initialization flag was not
added in gpiochip_irqchip_add_domain(), causing gpiochip_to_irq() to return
-EPROBE_DEFER.

Fixes: 5467801f1fcb ("gpio: Restrict usage of GPIO chip irq members before initialization")
Signed-off-by: Jiawen Wu 
Reviewed-by: Andy Shevchenko 
Reviewed-by: Linus Walleij 
Signed-off-by: Bartosz Golaszewski

gpio: sim: quietly ignore configured lines outside the bank

2023-06-07T12:49:35+00:00

The user-space policy of the gpio-sim is that configuration for lines
with offsets outside the bounds of the corresponding bank is ignored,
but gpio-sim is still using that configuration when constructing the
sim.  In the case of named lines this results in temporarily allocating
space for names that are not used, and for hogs results in errors being
logged when the gpio-sim attempts to register the out of range hog with
gpiolib:

gpiochip_machine_hog: unable to get GPIO desc: -22

Add checks to filter out any line configuration outside the bounds
of the bank when constructing the sim.

Signed-off-by: Kent Gibson 
Signed-off-by: Bartosz Golaszewski

gpio: sim: fix memory corruption when adding named lines and unnamed hogs

2023-06-06T15:02:34+00:00

When constructing the sim, gpio-sim constructs an array of named lines,
sized based on the largest offset of any named line, and then initializes
that array with the names of all lines, including unnamed hogs with higher
offsets.  In doing so it writes NULLs beyond the extent of the array.

Add a check that only named lines are used to initialize the array.

Fixes: cb8c474e79be ("gpio: sim: new testing module")
Signed-off-by: Kent Gibson
Signed-off-by: Bartosz Golaszewski

gpio-f7188x: fix chip name and pin count on Nuvoton chip

2023-05-23T08:47:41+00:00

In fact the device with chip id 0xD283 is called NCT6126D, and that is
the chip id the Nuvoton code was written for. Correct that name to avoid
confusion, because a NCT6116D in fact exists as well but has another
chip id, and is currently not supported.

The look at the spec also revealed that GPIO group7 in fact has 8 pins,
so correct the pin count in that group as well.

Fixes: d0918a84aff0 ("gpio-f7188x: Add GPIO support for Nuvoton NCT6116")
Reported-by: Xing Tong Wu 
Signed-off-by: Henning Schild 
Acked-by: Simon Guinot 
Signed-off-by: Bartosz Golaszewski