<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/fpga, branch v5.12.2</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'fpga-cleanup-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next</title>
<updated>2021-01-12T09:19:14+00:00</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2021-01-12T09:19:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=09381eb16ad887e05bc2a9500261afaa5dc77cd3'/>
<id>09381eb16ad887e05bc2a9500261afaa5dc77cd3</id>
<content type='text'>
Moritz writes:

First set of FPGA Manager changes for 5.12-rc1

This is the first set of changes for the FPGA Manager 5.12-rc1
mergewindow.

DFL:
- Minor cleanup, constifying a static attribute group

Core:
- Minor cleanup, using DEFINE_SPINLOCK over open coding it

All patches have been reviewed on the mailing list, and have been in the
last linux-next releases (as part of my for-next branch) without issues.

Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;

* tag 'fpga-cleanup-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
  fpga: dfl: fme: Constify static attribute_group structs
  fpga: Use DEFINE_SPINLOCK() for spinlock
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Moritz writes:

First set of FPGA Manager changes for 5.12-rc1

This is the first set of changes for the FPGA Manager 5.12-rc1
mergewindow.

DFL:
- Minor cleanup, constifying a static attribute group

Core:
- Minor cleanup, using DEFINE_SPINLOCK over open coding it

All patches have been reviewed on the mailing list, and have been in the
last linux-next releases (as part of my for-next branch) without issues.

Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;

* tag 'fpga-cleanup-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
  fpga: dfl: fme: Constify static attribute_group structs
  fpga: Use DEFINE_SPINLOCK() for spinlock
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: fme: Constify static attribute_group structs</title>
<updated>2021-01-10T18:57:14+00:00</updated>
<author>
<name>Rikard Falkeborn</name>
<email>rikard.falkeborn@gmail.com</email>
</author>
<published>2021-01-08T23:54:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e41d4c011706c97f2faea6ef2e46e51f52d8f715'/>
<id>e41d4c011706c97f2faea6ef2e46e51f52d8f715</id>
<content type='text'>
The only usage of these is to put their addresses in arrays of pointers
to const attribute_groups. Make them const to allow the compiler to put
them in read-only memory.

Signed-off-by: Rikard Falkeborn &lt;rikard.falkeborn@gmail.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The only usage of these is to put their addresses in arrays of pointers
to const attribute_groups. Make them const to allow the compiler to put
them in read-only memory.

Signed-off-by: Rikard Falkeborn &lt;rikard.falkeborn@gmail.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Use DEFINE_SPINLOCK() for spinlock</title>
<updated>2021-01-10T18:57:13+00:00</updated>
<author>
<name>Zheng Yongjun</name>
<email>zhengyongjun3@huawei.com</email>
</author>
<published>2020-12-28T13:51:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f5187329d07247393413b7a4bc32e16b35849e0f'/>
<id>f5187329d07247393413b7a4bc32e16b35849e0f</id>
<content type='text'>
spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().

Signed-off-by: Zheng Yongjun &lt;zhengyongjun3@huawei.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().

Signed-off-by: Zheng Yongjun &lt;zhengyongjun3@huawei.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: add support for N3000 Nios private feature</title>
<updated>2021-01-07T14:21:27+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2021-01-07T04:37:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=56172ab35338e3bb13c6bff65dea96b12e8c41ea'/>
<id>56172ab35338e3bb13c6bff65dea96b12e8c41ea</id>
<content type='text'>
This patch adds support for the Nios handshake private feature on Intel
PAC (Programmable Acceleration Card) N3000.

The Nios is the embedded processor on the FPGA card. This private feature
provides a handshake interface to FPGA Nios firmware, which receives
retimer configuration command from host and executes via an internal SPI
master (spi-altera). When Nios finishes the configuration, host takes over
the ownership of the SPI master to control an Intel MAX10 BMC (Board
Management Controller) Chip on the SPI bus.

For Nios firmware handshake part, this driver requests the retimer
configuration for Nios firmware on probe, and adds some sysfs nodes for
user to query the onboard retimer's working mode and Nios firmware
version.

For SPI part, this driver adds a spi-altera platform device as well as
the MAX10 BMC spi slave info. A spi-altera driver will be matched to
handle the following SPI work.

[mdf@kernel.org: Fixed up ABI doc kernel release]

Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-8-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for the Nios handshake private feature on Intel
PAC (Programmable Acceleration Card) N3000.

The Nios is the embedded processor on the FPGA card. This private feature
provides a handshake interface to FPGA Nios firmware, which receives
retimer configuration command from host and executes via an internal SPI
master (spi-altera). When Nios finishes the configuration, host takes over
the ownership of the SPI master to control an Intel MAX10 BMC (Board
Management Controller) Chip on the SPI bus.

For Nios firmware handshake part, this driver requests the retimer
configuration for Nios firmware on probe, and adds some sysfs nodes for
user to query the onboard retimer's working mode and Nios firmware
version.

For SPI part, this driver adds a spi-altera platform device as well as
the MAX10 BMC spi slave info. A spi-altera driver will be matched to
handle the following SPI work.

[mdf@kernel.org: Fixed up ABI doc kernel release]

Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-8-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: move dfl bus related APIs to include/linux/dfl.h</title>
<updated>2021-01-07T14:21:27+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2021-01-07T04:37:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ecc1641aca658ed4140751748f84985ffb6cce28'/>
<id>ecc1641aca658ed4140751748f84985ffb6cce28</id>
<content type='text'>
Now the dfl drivers could be made as independent modules and put in
different folders according to their functionalities. In order for
scattered dfl device drivers to include dfl bus APIs, move the
dfl bus APIs to a new header file in the public folder.

[mdf@kernel.org: Fixed up header guards to match filename]

Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-7-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now the dfl drivers could be made as independent modules and put in
different folders according to their functionalities. In order for
scattered dfl device drivers to include dfl bus APIs, move the
dfl bus APIs to a new header file in the public folder.

[mdf@kernel.org: Fixed up header guards to match filename]

Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-7-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: move dfl_device_id to mod_devicetable.h</title>
<updated>2021-01-07T14:21:27+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2021-01-07T04:37:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9326eecd9365a5b82220a4011592f7c0209566fc'/>
<id>9326eecd9365a5b82220a4011592f7c0209566fc</id>
<content type='text'>
In order to support MODULE_DEVICE_TABLE() for dfl device driver, this
patch moves struct dfl_device_id to mod_devicetable.h

Some brief description for DFL (Device Feature List) is added to make
the DFL known to the whole kernel.

Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-5-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order to support MODULE_DEVICE_TABLE() for dfl device driver, this
patch moves struct dfl_device_id to mod_devicetable.h

Some brief description for DFL (Device Feature List) is added to make
the DFL known to the whole kernel.

Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-5-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: fix the definitions of type &amp; feature_id for dfl devices</title>
<updated>2021-01-07T14:21:27+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2021-01-07T04:37:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e08b9e6d87cca2bd8f427d109d22970906aaf6f8'/>
<id>e08b9e6d87cca2bd8f427d109d22970906aaf6f8</id>
<content type='text'>
The value of the field dfl_device.type comes from the 12 bits register
field DFH_ID according to DFL spec. So this patch changes the definition
of the type field to u16.

Also it is not necessary to illustrate the valid bits of the type field
in comments. Instead we should explicitly define the possible values in
the enumeration type for it, because they are shared by hardware spec.
We should not let the compiler decide these values.

Similar changes are also applied to dfl_device.feature_id.

This patch also fixed the MODALIAS format according to the changes
above.

Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-4-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The value of the field dfl_device.type comes from the 12 bits register
field DFH_ID according to DFL spec. So this patch changes the definition
of the type field to u16.

Also it is not necessary to illustrate the valid bits of the type field
in comments. Instead we should explicitly define the possible values in
the enumeration type for it, because they are shared by hardware spec.
We should not let the compiler decide these values.

Similar changes are also applied to dfl_device.feature_id.

This patch also fixed the MODALIAS format according to the changes
above.

Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-4-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl-pci: locate DFLs by PCIe vendor specific capability</title>
<updated>2021-01-07T14:21:27+00:00</updated>
<author>
<name>Matthew Gerlach</name>
<email>matthew.gerlach@linux.intel.com</email>
</author>
<published>2021-01-07T04:37:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=fa41d10589be124404492b5181a818a509d8cb1c'/>
<id>fa41d10589be124404492b5181a818a509d8cb1c</id>
<content type='text'>
A PCIe vendor specific extended capability is introduced by Intel to
specify the start of a number of DFLs.

Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-3-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A PCIe vendor specific extended capability is introduced by Intel to
specify the start of a number of DFLs.

Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-3-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: refactor cci_enumerate_feature_devs()</title>
<updated>2021-01-07T14:21:27+00:00</updated>
<author>
<name>Matthew Gerlach</name>
<email>matthew.gerlach@linux.intel.com</email>
</author>
<published>2021-01-07T04:37:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3e265f836e9d62ccc4820157dc6a34d7685ba41d'/>
<id>3e265f836e9d62ccc4820157dc6a34d7685ba41d</id>
<content type='text'>
In preparation of looking for dfls based on a vendor specific pci
capability, move the code for the default method of finding the first
dfl at offset 0 of Bar 0 to its own function.

Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-2-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In preparation of looking for dfls based on a vendor specific pci
capability, move the code for the default method of finding the first
dfl at offset 0 of Bar 0 to its own function.

Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Link: https://lore.kernel.org/r/20210107043714.991646-2-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge 5.10-rc7 into char-misc-next</title>
<updated>2020-12-07T09:08:14+00:00</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2020-12-07T09:08:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a3ab07c642b2d75e645b1a07464291e325a496e0'/>
<id>a3ab07c642b2d75e645b1a07464291e325a496e0</id>
<content type='text'>
We want the fixes in here, and this resolves a merge issue with
drivers/misc/habanalabs/common/memory.c.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We want the fixes in here, and this resolves a merge issue with
drivers/misc/habanalabs/common/memory.c.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
