linux-stable.git/drivers/fpga, branch linux-5.4.y

fpga: zynq_fpga: Fix the wrong usage of dma_map_sgtable()

2025-08-28T14:21:32+00:00

commit 1ca61060de92a4320d73adfe5dc8d335653907ac upstream.

dma_map_sgtable() returns only 0 or the error code. Read sgt->nents to
get the number of mapped segments.

Fixes: 37e00703228a ("zynq_fpga: use sgtable-based scatterlist wrappers")
Reported-by: Pavel Pisa 
Closes: https://lore.kernel.org/linux-fpga/202508041548.22955.pisa@fel.cvut.cz/
Reviewed-by: Jason Gunthorpe 
Reviewed-by: Marek Szyprowski 
Signed-off-by: Xu Yilun 
Tested-by: Pavel Pisa 
Link: https://lore.kernel.org/r/20250806070605.1920909-2-yilun.xu@linux.intel.com
Signed-off-by: Greg Kroah-Hartman

zynq_fpga: use sgtable-based scatterlist wrappers

2025-08-28T14:21:31+00:00

commit 37e00703228ab44d0aacc32a97809a4f6f58df1b upstream.

Use common wrappers operating directly on the struct sg_table objects to
fix incorrect use of statterlists related calls. dma_unmap_sg() function
has to be called with the number of elements originally passed to the
dma_map_sg() function, not the one returned in sgtable's nents.

CC: stable@vger.kernel.org
Fixes: 425902f5c8e3 ("fpga zynq: Use the scatterlist interface")
Signed-off-by: Marek Szyprowski 
Reviewed-by: Jason Gunthorpe 
Reviewed-by: Xu Yilun 
Link: https://lore.kernel.org/r/20250616120932.1090614-1-m.szyprowski@samsung.com
Signed-off-by: Xu Yilun 
Signed-off-by: Greg Kroah-Hartman

fpga: altera-cvp: Increase credit timeout

2025-06-04T12:32:32+00:00

[ Upstream commit 0f05886a40fdc55016ba4d9ae0a9c41f8312f15b ]

Increase the timeout for SDM (Secure device manager) data credits from
20ms to 40ms. Internal stress tests running at 500 loops failed with the
current timeout of 20ms. At the start of a FPGA configuration, the CVP
host driver reads the transmit credits from SDM. It then sends bitstream
FPGA data to SDM based on the total credits. Each credit allows the
CVP host driver to send 4kBytes of data. There are situations whereby,
the SDM did not respond in time during testing.

Signed-off-by: Ang Tien Sung 
Signed-off-by: Kuhanh Murugasen Krishnan 
Acked-by: Xu Yilun 
Link: https://lore.kernel.org/r/20250212221249.2715929-1-tien.sung.ang@intel.com
Signed-off-by: Xu Yilun 
Signed-off-by: Sasha Levin

fpga: bridge: fix kernel-doc parameter description

2023-05-17T09:35:46+00:00

[ Upstream commit 7ef1a2c1c9dffa177ecc3ea50b7f5ee63a621137 ]

Fix the kernel-doc description for the "struct fpga_image_info *info"
parameter of the fpga_bridge_get() function.

Fixes: 060ac5c8fa7b ("fpga: bridge: kernel-doc fixes")
Signed-off-by: Marco Pagani 
Reviewed-by: Tom Rix 
Acked-by: Xu Yilun 
Link: https://lore.kernel.org/r/20230301140309.512578-1-marpagan@redhat.com
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Sasha Levin

fpga: stratix10-soc: Fix return value check in s10_ops_write_init()

2023-02-22T11:50:28+00:00

commit 65ea840afd508194b0ee903256162aa87e46ec30 upstream.

In case of error, the function stratix10_svc_allocate_memory()
returns ERR_PTR() and never returns NULL. The NULL test in the
return value check should be replaced with IS_ERR().

Fixes: e7eef1d7633a ("fpga: add intel stratix10 soc fpga manager driver")
Signed-off-by: Zheng Yongjun 
Reviewed-by: Russ Weight 
Cc: stable@vger.kernel.org
Acked-by: Xu Yilun 
Link: https://lore.kernel.org/r/20221126071430.19540-1-zhengyongjun3@huawei.com
Signed-off-by: Xu Yilun 
Signed-off-by: Greg Kroah-Hartman

fpga: altera-pr-ip: fix unsigned comparison with less than zero

2022-08-25T09:17:51+00:00

[ Upstream commit 2df84a757d87fd62869fc401119d429735377ec5 ]

Fix the "comparison with less than zero" warning reported by
cppcheck for the unsigned (size_t) parameter count of the
alt_pr_fpga_write() function.

Fixes: d201cc17a8a3 ("fpga pr ip: Core driver support for Altera Partial Reconfiguration IP")
Reviewed-by: Tom Rix 
Acked-by: Xu Yilun 
Signed-off-by: Marco Pagani 
Link: https://lore.kernel.org/r/20220609140520.42662-1-marpagan@redhat.com
Signed-off-by: Xu Yilun 
Signed-off-by: Sasha Levin

fpga: machxo2-spi: Fix missing error code in machxo2_write_complete()

2021-09-30T08:09:23+00:00

[ Upstream commit a1e4470823d99e75b596748086e120dea169ed3c ]

The error code is missing in this code scenario, add the error code
'-EINVAL' to the return value 'ret'.

Eliminate the follow smatch warning:

drivers/fpga/machxo2-spi.c:341 machxo2_write_complete()
  warn: missing error code 'ret'.

[mdf@kernel.org: Reworded commit message]
Fixes: 88fb3a002330 ("fpga: lattice machxo2: Add Lattice MachXO2 support")
Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Chong 
Signed-off-by: Moritz Fischer 
Signed-off-by: Sasha Levin

fpga: machxo2-spi: Return an error on failure

2021-09-30T08:09:23+00:00

[ Upstream commit 34331739e19fd6a293d488add28832ad49c9fc54 ]

Earlier successes leave 'ret' in a non error state, so these errors are
not reported. Set ret to -EINVAL before going to the error handler.

This addresses two issues reported by smatch:
drivers/fpga/machxo2-spi.c:229 machxo2_write_init()
  warn: missing error code 'ret'

drivers/fpga/machxo2-spi.c:316 machxo2_write_complete()
  warn: missing error code 'ret'

[mdf@kernel.org: Reworded commit message]
Fixes: 88fb3a002330 ("fpga: lattice machxo2: Add Lattice MachXO2 support")
Reported-by: Dan Carpenter 
Signed-off-by: Tom Rix 
Signed-off-by: Moritz Fischer 
Signed-off-by: Sasha Levin

fpga: stratix10-soc: Add missing fpga_mgr_free() call

2021-07-19T06:53:15+00:00

commit d9ec9daa20eb8de1efe6abae78c9835ec8ed86f9 upstream.

The stratix10-soc driver uses fpga_mgr_create() function and is therefore
responsible to call fpga_mgr_free() to release the class driver resources.
Add a missing call to fpga_mgr_free in the s10_remove() function.

Signed-off-by: Russ Weight 
Reviewed-by: Xu Yilun 
Signed-off-by: Moritz Fischer 
Fixes: e7eef1d7633a ("fpga: add intel stratix10 soc fpga manager driver")
Cc: stable 
Link: https://lore.kernel.org/r/20210614170909.232415-3-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman

fpga: dfl: fix bug in port reset handshake

2020-07-29T08:18:31+00:00

[ Upstream commit 8614afd689df59d9ce019439389be20bd788a897 ]

When putting the port in reset, driver must wait for the soft reset
acknowledgment bit instead of the soft reset bit.

Fixes: 47c1b19c160f (fpga: dfl: afu: add port ops support)
Signed-off-by: Matthew Gerlach 
Signed-off-by: Xu Yilun 
Acked-by: Wu Hao 
Reviewed-by: Tom Rix 
Signed-off-by: Moritz Fischer 
Signed-off-by: Sasha Levin