<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/firmware/xilinx, branch linux-5.6.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2020-02-08T22:04:19+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-02-08T22:04:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=eab3540562fb44f830e09492374fcc69a283ce47'/>
<id>eab3540562fb44f830e09492374fcc69a283ce47</id>
<content type='text'>
Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - Nvidia: Fuse support for Tegra194, continued memory controller
     pieces for Tegra30

   - NXP/FSL: Refactorings of QuickEngine drivers to support
     ARM/ARM64/PPC

   - NXP/FSL: i.MX8MP SoC driver pieces

   - TI Keystone: ring accelerator driver

   - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.

   - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
     communication for power management

   - Overall support patch set for cpuidle on more complex hierarchies
     (PSCI-based)

  and misc cleanups, refactorings of Marvell, TI, other platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
  drivers: soc: xilinx: Use mailbox IPI callback
  dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
  drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
  MAINTAINERS: Add brcmstb PCIe controller entry
  soc/tegra: fuse: Unmap registers once they are not needed anymore
  soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
  soc/tegra: fuse: Warn if straps are not ready
  soc/tegra: fuse: Cache values of straps and Chip ID registers
  memory: tegra30-emc: Correct error message for timed out auto calibration
  memory: tegra30-emc: Firm up hardware programming sequence
  memory: tegra30-emc: Firm up suspend/resume sequence
  soc/tegra: regulators: Do nothing if voltage is unchanged
  memory: tegra: Correct reset value of xusb_hostr
  soc/tegra: fuse: Add APB DMA dependency for Tegra20
  bus: tegra-aconnect: Remove PM_CLK dependency
  dt-bindings: mediatek: add MT6765 power dt-bindings
  soc: mediatek: cmdq: delete not used define
  memory: tegra: Add support for the Tegra194 memory controller
  memory: tegra: Only include support for enabled SoCs
  memory: tegra: Support DVFS on Tegra186 and later
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - Nvidia: Fuse support for Tegra194, continued memory controller
     pieces for Tegra30

   - NXP/FSL: Refactorings of QuickEngine drivers to support
     ARM/ARM64/PPC

   - NXP/FSL: i.MX8MP SoC driver pieces

   - TI Keystone: ring accelerator driver

   - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.

   - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
     communication for power management

   - Overall support patch set for cpuidle on more complex hierarchies
     (PSCI-based)

  and misc cleanups, refactorings of Marvell, TI, other platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
  drivers: soc: xilinx: Use mailbox IPI callback
  dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
  drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
  MAINTAINERS: Add brcmstb PCIe controller entry
  soc/tegra: fuse: Unmap registers once they are not needed anymore
  soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
  soc/tegra: fuse: Warn if straps are not ready
  soc/tegra: fuse: Cache values of straps and Chip ID registers
  memory: tegra30-emc: Correct error message for timed out auto calibration
  memory: tegra30-emc: Firm up hardware programming sequence
  memory: tegra30-emc: Firm up suspend/resume sequence
  soc/tegra: regulators: Do nothing if voltage is unchanged
  memory: tegra: Correct reset value of xusb_hostr
  soc/tegra: fuse: Add APB DMA dependency for Tegra20
  bus: tegra-aconnect: Remove PM_CLK dependency
  dt-bindings: mediatek: add MT6765 power dt-bindings
  soc: mediatek: cmdq: delete not used define
  memory: tegra: Add support for the Tegra194 memory controller
  memory: tegra: Only include support for enabled SoCs
  memory: tegra: Support DVFS on Tegra186 and later
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: zynqmp: Warn user if clock user are more than allowed</title>
<updated>2020-01-23T21:25:25+00:00</updated>
<author>
<name>Rajan Vaja</name>
<email>rajan.vaja@xilinx.com</email>
</author>
<published>2019-12-05T06:35:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=df2a4d94f1720e24643a9870a01a1c2895d13b20'/>
<id>df2a4d94f1720e24643a9870a01a1c2895d13b20</id>
<content type='text'>
Warn user if clock is used by more than allowed devices.
This check is done by firmware and returns respective
error code. Upon receiving error code for excessive user,
warn user for the same.

This change is done to restrict VPLL use count. It is
assumed that VPLL is used by one user only.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Link: https://lkml.kernel.org/r/1575527759-26452-4-git-send-email-rajan.vaja@xilinx.com
Acked-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Warn user if clock is used by more than allowed devices.
This check is done by firmware and returns respective
error code. Upon receiving error code for excessive user,
warn user for the same.

This change is done to restrict VPLL use count. It is
assumed that VPLL is used by one user only.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Link: https://lkml.kernel.org/r/1575527759-26452-4-git-send-email-rajan.vaja@xilinx.com
Acked-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: firmware: xilinx: Add support for feature check</title>
<updated>2019-12-12T14:46:04+00:00</updated>
<author>
<name>Ravi Patel</name>
<email>ravi.patel@xilinx.com</email>
</author>
<published>2019-11-12T08:35:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=461011b1e1ab62aa8a8af78d5b7ee0f81bd1fa37'/>
<id>461011b1e1ab62aa8a8af78d5b7ee0f81bd1fa37</id>
<content type='text'>
Query for corresponding feature before calling EEMI API
from the driver.

Signed-off-by: Ravi Patel &lt;ravi.patel@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Query for corresponding feature before calling EEMI API
from the driver.

Signed-off-by: Ravi Patel &lt;ravi.patel@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: xilinx: Add support for versal soc</title>
<updated>2019-10-16T10:55:37+00:00</updated>
<author>
<name>Jolly Shah</name>
<email>jolly.shah@xilinx.com</email>
</author>
<published>2019-10-07T18:52:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=af3f1afac38d34083faad852172d0ec82749c046'/>
<id>af3f1afac38d34083faad852172d0ec82749c046</id>
<content type='text'>
Versal is xilinx's next generation soc. This patch adds
driver support required to be compatible with versal device.

Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Versal is xilinx's next generation soc. This patch adds
driver support required to be compatible with versal device.

Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: xilinx: Add fpga API's</title>
<updated>2019-04-15T08:22:51+00:00</updated>
<author>
<name>Nava kishore Manne</name>
<email>nava.manne@xilinx.com</email>
</author>
<published>2019-04-15T07:17:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e840decc1954521ff73bbc87b5b3ea36af1704d2'/>
<id>e840decc1954521ff73bbc87b5b3ea36af1704d2</id>
<content type='text'>
This Patch Adds fpga API's to support the Bitstream loading
by using firmware interface.

Signed-off-by: Nava kishore Manne &lt;nava.manne@xilinx.com&gt;
Reviewed-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This Patch Adds fpga API's to support the Bitstream loading
by using firmware interface.

Signed-off-by: Nava kishore Manne &lt;nava.manne@xilinx.com&gt;
Reviewed-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: Defer probe if firmware is not ready</title>
<updated>2019-03-18T12:45:27+00:00</updated>
<author>
<name>Rajan Vaja</name>
<email>rajan.vaja@xilinx.com</email>
</author>
<published>2019-03-04T23:18:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3d0313786470acb414b7d5fdd2202f061acffb02'/>
<id>3d0313786470acb414b7d5fdd2202f061acffb02</id>
<content type='text'>
Driver needs ZynqMP firmware interface to call EEMI
APIs. In case firmware is not ready, dependent drivers
should wait until the firmware is ready.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jollys@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Driver needs ZynqMP firmware interface to call EEMI
APIs. In case firmware is not ready, dependent drivers
should wait until the firmware is ready.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jollys@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: xilinx: fix debugfs write handler</title>
<updated>2019-03-18T12:43:54+00:00</updated>
<author>
<name>Jann Horn</name>
<email>jannh@google.com</email>
</author>
<published>2019-02-18T21:43:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b9472f7d8224460499dd7128ec944735ed5345a0'/>
<id>b9472f7d8224460499dd7128ec944735ed5345a0</id>
<content type='text'>
 - Userspace wants to write a string with `len` bytes, not counting the
   terminating NULL, so we should allocate `len+1` bytes. It looks like the
   current code relied on having a nullbyte directly behind `kern_buff`,
   which happens to work reliably as long as `len` isn't one of the kmalloc
   size classes.
 - strncpy_from_user() is completely wrong here; userspace is giving us a
   (not necessarily null-terminated) buffer and its length.
   strncpy_from_user() is for cases in which we don't know the length.
 - Don't let broken userspace allocate arbitrarily big kmalloc allocations.

Just use memdup_user_nul(), which is designed precisely for things like
this.

Signed-off-by: Jann Horn &lt;jannh@google.com&gt;
Acked-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
 - Userspace wants to write a string with `len` bytes, not counting the
   terminating NULL, so we should allocate `len+1` bytes. It looks like the
   current code relied on having a nullbyte directly behind `kern_buff`,
   which happens to work reliably as long as `len` isn't one of the kmalloc
   size classes.
 - strncpy_from_user() is completely wrong here; userspace is giving us a
   (not necessarily null-terminated) buffer and its length.
   strncpy_from_user() is for cases in which we don't know the length.
 - Don't let broken userspace allocate arbitrarily big kmalloc allocations.

Just use memdup_user_nul(), which is designed precisely for things like
this.

Signed-off-by: Jann Horn &lt;jannh@google.com&gt;
Acked-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: soc: xilinx: Add ZynqMP power domain driver</title>
<updated>2019-02-12T12:38:16+00:00</updated>
<author>
<name>Jolly Shah</name>
<email>jolly.shah@xilinx.com</email>
</author>
<published>2019-02-01T22:08:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e23d9c6d0d4912fab12cd2d56070b0a8199772f0'/>
<id>e23d9c6d0d4912fab12cd2d56070b0a8199772f0</id>
<content type='text'>
The zynqmp-genpd driver communicates the usage requirements
for logical power domains / devices to the platform FW.
FW is responsible for choosing appropriate power states,
taking Linux' usage information into account.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The zynqmp-genpd driver communicates the usage requirements
for logical power domains / devices to the platform FW.
FW is responsible for choosing appropriate power states,
taking Linux' usage information into account.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: xilinx: Add APIs to control node status/power</title>
<updated>2019-02-12T12:37:48+00:00</updated>
<author>
<name>Rajan Vaja</name>
<email>rajan.vaja@xilinx.com</email>
</author>
<published>2019-02-01T22:08:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c1986ac3d483b051fc237aea3e9812fd1bb4d239'/>
<id>c1986ac3d483b051fc237aea3e9812fd1bb4d239</id>
<content type='text'>
Add Xilinx ZynqMP firmware APIs to control node status
and power. These APIs allows turning on/off power domain
and setting capabilities of devices present in power domain.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Xilinx ZynqMP firmware APIs to control node status
and power. These APIs allows turning on/off power domain
and setting capabilities of devices present in power domain.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: xilinx: Implement ZynqMP power management APIs</title>
<updated>2019-02-12T12:36:23+00:00</updated>
<author>
<name>Jolly Shah</name>
<email>jolly.shah@xilinx.com</email>
</author>
<published>2019-01-29T20:38:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e178df31cf41ba7cd63f7830bd02fd918d16592d'/>
<id>e178df31cf41ba7cd63f7830bd02fd918d16592d</id>
<content type='text'>
Add Xilinx ZynqMP firmware APIs to set suspend mode
and inform firmware that master has initialized its
own power management.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Xilinx ZynqMP firmware APIs to set suspend mode
and inform firmware that master has initialized its
own power management.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
