linux-stable.git/drivers/dma, branch v6.14.2

dmaengine: ptdma: Utilize the AE4DMA engine's multi-queue functionality

2025-04-10T12:44:31+00:00

[ Upstream commit 6565439894570a07b00dba0b739729fe6b56fba4 ]

As AE4DMA offers multi-channel functionality compared to PTDMA’s single
queue, utilize multi-queue, which supports higher speeds than PTDMA, to
achieve higher performance using the AE4DMA workqueue based mechanism.

Fixes: 69a47b16a51b ("dmaengine: ptdma: Extend ptdma to support multi-channel and version")
Signed-off-by: Basavaraj Natikar 
Link: https://lore.kernel.org/r/20250203162511.911946-4-Basavaraj.Natikar@amd.com
Signed-off-by: Vinod Koul 
Signed-off-by: Sasha Levin

dmaengine: ae4dma: Use the MSI count and its corresponding IRQ number

2025-04-10T12:44:31+00:00

[ Upstream commit feba04e6fdf4daccc83fc09d499a3e32c178edb4 ]

Instead of using the defined maximum hardware queue, which can lead to
incorrect values if the counts mismatch, use the exact supported MSI
count and its corresponding IRQ number.

Fixes: 90a30e268d9b ("dmaengine: ae4dma: Add AMD ae4dma controller driver")
Signed-off-by: Basavaraj Natikar 
Link: https://lore.kernel.org/r/20250203162511.911946-3-Basavaraj.Natikar@amd.com
Signed-off-by: Vinod Koul 
Signed-off-by: Sasha Levin

dmaengine: fsl-edma: free irq correctly in remove path

2025-04-10T12:44:31+00:00

[ Upstream commit fa70c4c3c580c239a0f9e83a14770ab026e8d820 ]

Add fsl_edma->txirq/errirq check to avoid below warning because no
errirq at i.MX9 platform. Otherwise there will be kernel dump:
WARNING: CPU: 0 PID: 11 at kernel/irq/devres.c:144 devm_free_irq+0x74/0x80
Modules linked in:
CPU: 0 UID: 0 PID: 11 Comm: kworker/u8:0 Not tainted 6.12.0-rc7#18
Hardware name: NXP i.MX93 11X11 EVK board (DT)
Workqueue: events_unbound deferred_probe_work_func
pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : devm_free_irq+0x74/0x80
lr : devm_free_irq+0x48/0x80
Call trace:
 devm_free_irq+0x74/0x80 (P)
 devm_free_irq+0x48/0x80 (L)
 fsl_edma_remove+0xc4/0xc8
 platform_remove+0x28/0x44
 device_remove+0x4c/0x80

Fixes: 44eb827264de ("dmaengine: fsl-edma: request per-channel IRQ only when channel is allocated")
Reviewed-by: Frank Li 
Signed-off-by: Peng Fan 
Link: https://lore.kernel.org/r/20250228071720.3780479-2-peng.fan@oss.nxp.com
Signed-off-by: Vinod Koul 
Signed-off-by: Sasha Levin

dmaengine: fsl-edma: cleanup chan after dma_async_device_unregister

2025-04-10T12:44:30+00:00

[ Upstream commit c9c59da76ce9cb3f215b66eb3708cda1134a5206 ]

There is kernel dump when do module test:
sysfs: cannot create duplicate filename
/devices/platform/soc@0/44000000.bus/44000000.dma-controller/dma/dma0chan0
 __dma_async_device_channel_register+0x128/0x19c
 dma_async_device_register+0x150/0x454
 fsl_edma_probe+0x6cc/0x8a0
 platform_probe+0x68/0xc8

fsl_edma_cleanup_vchan will unlink vchan.chan.device_node, while
dma_async_device_unregister  needs the link to do
__dma_async_device_channel_unregister. So need move fsl_edma_cleanup_vchan
after dma_async_device_unregister to make sure channel could be freed.

So clean up chan after dma_async_device_unregister to address this.

Fixes: 6f93b93b2a1b ("dmaengine: fsl-edma: kill the tasklets upon exit")
Reviewed-by: Frank Li 
Signed-off-by: Peng Fan 
Link: https://lore.kernel.org/r/20250228071720.3780479-1-peng.fan@oss.nxp.com
Signed-off-by: Vinod Koul 
Signed-off-by: Sasha Levin

Merge tag 'dmaengine-fix-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

2025-03-02T18:08:45+00:00

Pull dmaengine fixes from Vinod Koul:

 - tegra210 div_u64 divison and max page fixes

 - revert Qualcomm unavailable register workaround which is causing
   regression, fixes have been proposed but still gaps are present so
   revert this for now

* tag 'dmaengine-fix-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine:
  dmaengine: Revert "dmaengine: qcom: bam_dma: Avoid writing unavailable register"
  dmaengine: tegra210-adma: check for adma max page
  dmaengine: tegra210-adma: Use div_u64 for 64 bit division

dmaengine: Revert "dmaengine: qcom: bam_dma: Avoid writing unavailable register"

2025-02-27T07:59:15+00:00

This commit causes a hard crash on sdm845 and likely other platforms.
Revert it until a proper fix is found.

This reverts commit 57a7138d0627: ("dmaengine: qcom: bam_dma: Avoid writing
unavailable register")

Signed-off-by: Caleb Connolly 
Fixes: 57a7138d0627 ("dmaengine: qcom: bam_dma: Avoid writing unavailable register")
Tested-by: Neil Armstrong  # on sdm845-DB845c
Tested-by: David Heidelberg 
Link: https://lore.kernel.org/r/20250208223112.142567-1-caleb.connolly@linaro.org
Signed-off-by: Vinod Koul

tegra210-adma: fix 32-bit x86 build

2025-02-15T17:28:55+00:00

The Tegra210 Audio DMA controller driver did a plain divide:

	page_no = (res_page->start - res_base->start) / cdata->ch_base_offset;

which causes problems on 32-bit x86 configurations that have 64-bit
resource sizes:

  x86_64-linux-ld: drivers/dma/tegra210-adma.o: in function `tegra_adma_probe':
  tegra210-adma.c:(.text+0x1322): undefined reference to `__udivdi3'

because gcc doesn't generate the trivial code for a 64-by-32 divide,
turning it into a function call to do a full 64-by-64 divide.  And the
kernel intentionally doesn't provide that helper function, because 99%
of the time all you want is the narrower version.

Of course, tegra210 is a 64-bit architecture and the 32-bit x86 build is
purely for build testing, so this really is just about build coverage
failure.

But build coverage is good.

Side note: div_u64() would be suboptimal if you actually have a 32-bit
resource_t, so our "helper" for divides are admittedly making it harder
than it should be to generate good code for all the possible cases.

At some point, I'll consider 32-bit x86 so entirely legacy that I can't
find it in myself to care any more, and we'll just add the __udivdi3
library function.

But for now, the right thing to do is to use "div_u64()" to show that
you know that you are doing the simpler divide with a 32-bit number.
And the build error enforces that.

While fixing the build issue, also check for division-by-zero, and for
overflow.  Which hopefully cannot happen on real production hardware,
but the value of 'ch_base_offset' can definitely be zero in other
places.

Reported-by: Guenter Roeck 
Signed-off-by: Linus Torvalds

dmaengine: tegra210-adma: check for adma max page

2025-02-10T14:19:17+00:00

Have additional check for max channel page during the probe
to cover if any offset overshoot happens due to wrong DT
configuration.

Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page")
Cc: stable@vger.kernel.org
Signed-off-by: Mohan Kumar D 
Reviewed-by: Jon Hunter 
Acked-by: Thierry Reding 
Link: https://lore.kernel.org/r/20250210135413.2504272-3-mkumard@nvidia.com
Signed-off-by: Vinod Koul

dmaengine: tegra210-adma: Use div_u64 for 64 bit division

2025-02-10T14:19:17+00:00

The ADMA base and page address are represented using a 64-bit variable.
To accurately derive the exact ADMA page number provided from the DT
properties, use the div_u64() to divide the address difference between
adma page and base address by the page offset.

This change fixes the below error
   "ERROR: modpost: "__udivdi3" [drivers/dma/tegra210-adma.ko] undefined!
    ld: drivers/dma/tegra210-adma.o: in function `tegra_adma_probe':
    tegra210-adma.c:(.text+0x12cf): undefined reference to `__udivdi3'"

Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page")
Cc: stable@vger.kernel.org
Reported-by: kernel test robot 
Closes: https://lore.kernel.org/oe-kbuild-all/202412250204.GCQhdKe3-lkp@intel.com/
Signed-off-by: Mohan Kumar D 
Reviewed-by: Jon Hunter 
Acked-by: Thierry Reding 
Link: https://lore.kernel.org/r/20250210135413.2504272-2-mkumard@nvidia.com
Signed-off-by: Vinod Koul

Merge tag 'dmaengine-6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

2025-01-29T22:29:57+00:00

Pull dmaengine updates from Vinod Koul:
 "A bunch of new device support and updates to few drivers, biggest of
  them amd ones.

  New support:
   - TI J722S CSI BCDMA controller support
   - Intel idxd Panther Lake family platforms
   - Allwinner F1C100s suniv DMA
   - Qualcomm QCS615, QCS8300, SM8750, SA8775P GPI dma controller support
   - AMD ae4dma controller support and reorganisation of amd driver

  Updates:
   - Channel page support for Nvidia Tegra210 adma driver
   - Freescale support for S32G based platforms
   - Yamilfy atmel dma bindings"

* tag 'dmaengine-6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (45 commits)
  dmaengine: idxd: Enable Function Level Reset (FLR) for halt
  dmaengine: idxd: Refactor halt handler
  dmaengine: idxd: Add idxd_device_config_save() and idxd_device_config_restore() helpers
  dmaengine: idxd: Binding and unbinding IDXD device and driver
  dmaengine: idxd: Add idxd_pci_probe_alloc() helper
  dt-bindings: dma: atmel: Convert to json schema
  dt-bindings: dma: st-stm32-dmamux: Add description for dma-cell values
  dmaengine: qcom: gpi: Add GPI immediate DMA support for SPI protocol
  dt-bindings: dma: adi,axi-dmac: deprecate adi,channels node
  dt-bindings: dma: adi,axi-dmac: convert to yaml schema
  dmaengine: mv_xor: switch to for_each_child_of_node_scoped()
  dmaengine: bcm2835-dma: Prevent suspend if DMA channel is busy
  dmaengine: tegra210-adma: Support channel page
  dt-bindings: dma: Support channel page to nvidia,tegra210-adma
  dmaengine: ti: k3-udma: Add support for J722S CSI BCDMA
  dt-bindings: dma: ti: k3-bcdma: Add J722S CSI BCDMA
  dmaengine: ti: edma: fix OF node reference leaks in edma_driver
  dmaengine: ti: edma: make the loop condition simpler in edma_probe()
  dmaengine: fsl-edma: read/write multiple registers in cyclic transactions
  dmaengine: fsl-edma: add support for S32G based platforms
  ...