linux-stable.git/drivers/crypto, branch v7.1.5

crypto: xilinx-trng - Remove crypto_rng interface

2026-07-24T14:21:26+00:00

commit 32b4d29280ed2a991dc196d5845b892acedc63b8 upstream.

Implementing the crypto_rng interface has no purpose, as it isn't used
in practice.  It's being removed from other drivers too.  Just remove
it.  This leaves hwrng, which is actually used.

Tagging with 'Cc stable' due to the bugs that this removes:

  - xtrng_trng_generate() sometimes returned success even when it didn't
    fill in all the bytes.

  - It was possible for xtrng_trng_generate() and
    xtrng_hwrng_trng_read() to run concurrently and interfere with each
    other, as the locking code in xtrng_hwrng_trng_read() was broken.

Fixes: 8979744aca80 ("crypto: xilinx - Add TRNG driver for Versal")
Cc: stable@vger.kernel.org
Signed-off-by: Eric Biggers 
Signed-off-by: Herbert Xu 
Signed-off-by: Greg Kroah-Hartman

crypto: cavium/cpt - fix DMA cleanup using wrong loop index

2026-07-24T14:19:50+00:00

[ Upstream commit 9dbf173bd32d5f81b005008b682bfb50aa093455 ]

The sg_cleanup error path used list[i] instead of list[j] when unmapping
DMA buffers, leaking successfully mapped entries and repeatedly unmapping
the failed one.

Fixes: c694b233295b ("crypto: cavium - Add the Virtual Function driver for CPT")
Signed-off-by: Felix Gu 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin

crypto: marvell/octeontx - fix DMA cleanup using wrong loop index

2026-07-24T14:19:50+00:00

[ Upstream commit 7891c64c0520519782470ba29bac8a5761e295d8 ]

The sg_cleanup path used list[i] instead of list[j] when unmapping DMA
buffers, leaking successfully mapped entries and repeatedly unmapping
the failed one.

Fixes: 10b4f09491bf ("crypto: marvell - add the Virtual Function driver for CPT")
Signed-off-by: Felix Gu 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin

crypto: ccp/tsm - Enable the root port after the endpoint

2026-07-24T14:19:24+00:00

[ Upstream commit 50e506201bab875545c7a9443bd7e1c71804e553 ]

The PCIe r7.0, chapter "6.33.8 Other IDE Rules" mandates if selective IDE
is enabled for config requersts, a stream must be enabled on the endpoint
before enabling it on the rootport:

===
For Selective IDE, the Stream must not be used until it has been enabled in
both Partner Ports. For cases where one of the Partner Ports is a Root Port
and Selective IDE for Configuration Requests is enabled, the other
Partner Port must be enabled prior to the Root Port. For other scenarios,
the mechanisms to satisfy this requirement are implementation-specific.
===

Do what the spec says.

Fixes: 4be423572da1 ("crypto/ccp: Implement SEV-TIO PCIe IDE (phase1)")
Signed-off-by: Alexey Kardashevskiy 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin

crypto: tegra - Return ENOMEM when input buffer allocation fails for ccm

2026-07-24T14:19:24+00:00

[ Upstream commit 690a5f9e5c972a580565ce544ed1627ccf1e84de ]

Ensure the ENOMEM error value is set when the input buffer allocation
fails in tegra_ccm_do_one_req.

Fixes: 1e245948ca0c ("crypto: tegra - finalize crypto req on error")
Reported-by: Vladislav Dronov 
Signed-off-by: Herbert Xu 
Reviewed-by: Vladislav Dronov 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin

crypto: tegra - Fix dma_free_coherent size error

2026-07-24T14:19:24+00:00

[ Upstream commit 03215b8457784540acc741e6331e355b62c6c8ab ]

When freeing a coherent DMA buffer, the size must match the value
that was used during the allocation.

Unfortunately the size field in the tegra driver gets overwritten
by this point so it no longer matches and creates a warning.

Fix this by saving a copy of the size on the stack.

Note that the ccm function actually mixes up the inbuf and outbuf
sizes, but it doesn't matter because the two sizes are actually
equal.

Fixes: 1cb328da4e8f ("crypto: tegra - Do not use fixed size buffers")
Reporeted-by: Patrick Talbert 
Signed-off-by: Herbert Xu 
Reviewed-by: Vladislav Dronov 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin

crypto: inside-secure/eip93 - Add check for devm_request_threaded_irq

2026-07-24T14:19:24+00:00

[ Upstream commit 85a61bf9145d4097c740ffcf3aa832d930a8913b ]

As the potential failure of the devm_request_threaded_irq(),
it should be better to check the return value and return
error if fails.

Fixes: 9739f5f93b78 ("crypto: eip93 - Add Inside Secure SafeXcel EIP-93 crypto engine support")
Signed-off-by: Aleksander Jan Bajkowski 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin

crypto: hisilicon/qm - disable error report before flr

2026-07-24T14:19:24+00:00

[ Upstream commit e71dc5602b9a29027f6aedd5990d3e8c4f638c8c ]

Before function level reset, driver first disable device error report
and then waits for the device reset to complete. However, when the
error is recovered, the error bits will be enabled again, resulting in
invalid disable. It is modified to detect that there is no error
before disable error report, and then do FLR.

Fixes: 7ce396fa12a9 ("crypto: hisilicon - add FLR support")
Signed-off-by: Weili Qian 
Signed-off-by: Zongyu Wu 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin

crypto: eip93 - fix reset ring register definition

2026-07-24T14:19:18+00:00

[ Upstream commit 09e6b79b8ce388993aec9ac91b1cb2c181c27bd9 ]

This patch fixes a descriptor ring reset. This causes a hang in the
driver's unload/load sequence.

Fixes: 9739f5f93b78 ("crypto: eip93 - Add Inside Secure SafeXcel EIP-93 crypto engine support")
Suggested-by: Benjamin Larsson 
Signed-off-by: Aleksander Jan Bajkowski 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin

crypto: safexcel - Fix potential memory leak in safexcel_pci_probe()

2026-07-24T14:19:13+00:00

[ Upstream commit c36faca103a685590281412e47df74b550f71886 ]

The memory allocated for priv in safexcel_pci_probe() is not freed in the
error paths, as well as in the PCI remove function. Fix this by using
device managed allocation.

Fixes: 625f269a5a7a ("crypto: inside-secure - add support for PCI based FPGA development board")
Signed-off-by: Abdun Nihaal 
Reviewed-by: Antoine Tenart 
Signed-off-by: Herbert Xu 
Signed-off-by: Sasha Levin