linux-stable.git/drivers/crypto/caam, branch v4.8

crypto: caam - fix IV loading for authenc (giv)decryption

2016-08-31T14:50:42+00:00

For algorithms that implement IV generators before the crypto ops,
the IV needed for decryption is initially located in req->src
scatterlist, not in req->iv.

Avoid copying the IV into req->iv by modifying the (givdecrypt)
descriptors to load it directly from req->src.
aead_givdecrypt() is no longer needed and goes away.

Cc:  # 4.3+
Fixes: 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Signed-off-by: Horia Geantă 
Signed-off-by: Herbert Xu

crypto: caam - fix non-hmac hashes

2016-08-09T10:25:11+00:00

Since 6de62f15b581 ("crypto: algif_hash - Require setkey before
accept(2)"), the AF_ALG interface requires userspace to provide a key
to any algorithm that has a setkey method.  However, the non-HMAC
algorithms are not keyed, so setting a key is unnecessary.

Fix this by removing the setkey method from the non-keyed hash
algorithms.

Fixes: 6de62f15b581 ("crypto: algif_hash - Require setkey before accept(2)")
Cc: 
Signed-off-by: Russell King 
Signed-off-by: Herbert Xu

crypto: caam - defer aead_set_sh_desc in case of zero authsize

2016-08-08T15:43:53+00:00

To be able to generate shared descriptors for AEAD, the authentication size
needs to be known. However, there is no imposed order of calling .setkey,
.setauthsize callbacks.

Thus, in case authentication size is not known at .setkey time, defer it
until .setauthsize is called.

The authsize != 0 check was incorrectly removed when converting the driver
to the new AEAD interface.

Cc:  # 4.3+
Fixes: 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Signed-off-by: Horia Geantă 
Signed-off-by: Herbert Xu

crypto: caam - fix echainiv(authenc) encrypt shared descriptor

2016-08-08T15:43:49+00:00

There are a few things missed by the conversion to the
new AEAD interface:

1 - echainiv(authenc) encrypt shared descriptor

The shared descriptor is incorrect: due to the order of operations,
at some point in time MATH3 register is being overwritten.

2 - buffer used for echainiv(authenc) encrypt shared descriptor

Encrypt and givencrypt shared descriptors (for AEAD ops) are mutually
exclusive and thus use the same buffer in context state: sh_desc_enc.

However, there's one place missed by s/sh_desc_givenc/sh_desc_enc,
leading to errors when echainiv(authenc(...)) algorithms are used:
DECO: desc idx 14: Header Error. Invalid length or parity, or
certain other problems.

While here, also fix a typo: dma_mapping_error() is checking
for validity of sh_desc_givenc_dma instead of sh_desc_enc_dma.

Cc:  # 4.3+
Fixes: 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Signed-off-by: Horia Geantă 
Signed-off-by: Herbert Xu

crypto: caam - add support for RSA algorithm

2016-07-05T15:05:24+00:00

Add RSA support to caam driver.

Initial author is Yashpal Dutta .

Signed-off-by: Tudor Ambarus 
Signed-off-by: Herbert Xu

crypto: caam - replace deprecated EXTRA_CFLAGS

2016-06-20T11:25:00+00:00

EXTRA_CFLAGS is still supported but its usage is deprecated.

Signed-off-by: Tudor Ambarus 
Reviewed-by: Horia Geantă 
Signed-off-by: Herbert Xu

crypto: caam - fix misspelled upper_32_bits

2016-06-20T11:24:39+00:00

An endianess fix mistakenly used higher_32_bits() instead of
upper_32_bits(), and that doesn't exist:

drivers/crypto/caam/desc_constr.h: In function 'append_ptr':
drivers/crypto/caam/desc_constr.h:84:75: error: implicit declaration of function 'higher_32_bits' [-Werror=implicit-function-declaration]
  *offset = cpu_to_caam_dma(ptr);

Signed-off-by: Arnd Bergmann 
Fixes: 261ea058f016 ("crypto: caam - handle core endianness != caam endianness")
Reviewed-by: Horia Geantă 
Signed-off-by: Herbert Xu

crypto: caam - add ARCH_LAYERSCAPE to supported architectures

2016-05-31T08:41:54+00:00

This basically adds support for ls1043a platform.

Signed-off-by: Horia Geantă 
Signed-off-by: Herbert Xu

crypto: caam - handle core endianness != caam endianness

2016-05-31T08:41:54+00:00

There are SoCs like LS1043A where CAAM endianness (BE) does not match
the default endianness of the core (LE).
Moreover, there are requirements for the driver to handle cases like
CPU_BIG_ENDIAN=y on ARM-based SoCs.
This requires for a complete rewrite of the I/O accessors.

PPC-specific accessors - {in,out}_{le,be}XX - are replaced with
generic ones - io{read,write}[be]XX.

Endianness is detected dynamically (at runtime) to allow for
multiplatform kernels, for e.g. running the same kernel image
on LS1043A (BE CAAM) and LS2080A (LE CAAM) armv8-based SoCs.

While here: debugfs entries need to take into consideration the
endianness of the core when displaying data. Add the necessary
glue code so the entries remain the same, but they are properly
read, regardless of the core and/or SEC endianness.

Note: pdb.h fixes only what is currently being used (IPsec).

Reviewed-by: Tudor Ambarus 
Signed-off-by: Horia Geantă 
Signed-off-by: Alex Porosanu 
Signed-off-by: Herbert Xu

crypto: caam - fix offset field in hw sg entries

2016-05-31T08:41:53+00:00

The offset field is 13 bits wide; make sure we don't overwrite more than
that in the caam hardware scatter gather structure.

Signed-off-by: Cristian Stoica 
Signed-off-by: Horia Geantă 
Signed-off-by: Herbert Xu