linux-stable.git/drivers/crypto/caam/ctrl.c, branch v6.5.2

Revert "crypto: caam - adjust RNG timing to support more devices"

2023-08-18T08:47:02+00:00

This reverts commit ef492d080302913e85122a2d92efa2ca174930f8.

This patch breaks the RNG on i.MX8MM.

Reported-by: Bastian Krause 
Link: https://lore.kernel.org/all/e1f3f073-9d5e-1bae-f4f8-08dc48adad62@pengutronix.de/
Signed-off-by: Herbert Xu

crypto: caam - optimize RNG sample size

2023-06-23T08:15:36+00:00

TRNG "sample size" (the total number of entropy samples that will be taken
during entropy generation) default / POR value is very conservatively
set to 2500.

Let's set it to 512, the same as the caam driver in U-boot
(drivers/crypto/fsl_caam.c) does.

This solves the issue of RNG performance dropping after a suspend/resume
cycle on parts where caam loses power, since the initial U-boot setttings
are lost and kernel does not restore them when resuming.

Note: when changing the sample size, the self-test parameters need to be
updated accordingly.

Signed-off-by: Horia Geantă 
Signed-off-by: Meenakshi Aggarwal 
Reviewed-by: Gaurav Jain 
Signed-off-by: Herbert Xu

crypto: caam - adjust RNG timing to support more devices

2023-06-23T08:15:36+00:00

Adjust RNG timing parameters to support more i.MX6 devices.

Signed-off-by: Victoria Milhoan 
Signed-off-by: Dan Douglass 
Signed-off-by: Vipul Kumar 
Signed-off-by: Horia Geantă 
Reviewed-by: Gaurav Jain 
Signed-off-by: Herbert Xu

crypto: caam - Fix soc_id matching

2023-05-19T08:45:43+00:00

Since, CAAM driver is probed before soc_device_attribute done as part of:
- drivers/soc/imx/soc-imx8m.c   (for i.MX8M)
- drivers/firmware/imx/ele_mu.c (EdgeLock Enclave kernel driver, for i.MX8ULP)

It is needed to return -EPROBE_DEFER, after calling soc_device_match() in
drivers/crypto/caam/ctrl.c.

soc_device_match returns NULL for:
- i.MX8M
- i.MX8ULP,
can be considered that the SoC device has not been probed yet.
Hence, it returns -EPROBE_DEFER directly.

caam: imx: change to use of_match_node in run_descriptor_deco0

Providing imx8m_machine_match to match:
- i.MX8M{Q,M,N,P},
- i.MX8ULP,
so as to start using of_match_node, to simplify the code.

Signed-off-by: Alice Guo 
Signed-off-by: Pankaj Gupta 
Reviewed-by: Dong Aisheng 
Reviewed-by: Horia Geanta 
Acked-by: Peng Fan 
Acked-by: Alice Guo 
Signed-off-by: Herbert Xu

crypto: caam - refactor RNG initialization

2023-05-12T10:48:01+00:00

RNG (re-)initialization will be needed on pm resume path,
thus refactor the corresponding code out of the probe callback.

Signed-off-by: Horia GeantA 
Signed-off-by: Leonard Crestez 
Signed-off-by: Dong Aisheng 
Signed-off-by: Meenakshi Aggarwal 
Reviewed-by: Gaurav Jain 
Signed-off-by: Herbert Xu

crypto: caam - OP-TEE firmware support

2023-04-14T10:59:34+00:00

caam driver needs to be aware of OP-TEE f/w presence, since some things
are done differently:

1. there is no access to controller's register page (note however that
some registers are aliased in job rings' register pages)

2 Due to this, MCFGR[PS] cannot be read and driver assumes
MCFGR[PS] = b'0 - engine using 32-bit address pointers.

This is in sync with the fact that:
-all i.MX SoCs currently use MCFGR[PS] = b'0
-only i.MX OP-TEE use cases don't allow access to controller register page

Signed-off-by: Horia GeantA 
Signed-off-by: Meenakshi Aggarwal 
Reviewed-by: Gaurav Jain 
Signed-off-by: Herbert Xu

crypto: caam - reduce page 0 regs access to minimum

2023-04-14T10:59:34+00:00

Use job ring register map, in place of controller register map
to access page 0 registers, as access to the controller register
map is not permitted.

Signed-off-by: Horia GeantA 
Signed-off-by: Gaurav Jain 
Signed-off-by: Meenakshi Aggarwal 
Reviewed-by: Varun Sethi 
Reviewed-by: Gaurav Jain 
Signed-off-by: Herbert Xu

crypto: caam - Clear some memory in instantiate_rng

2023-03-31T09:50:09+00:00

According to the comment at the end of the 'for' loop just a few lines
below, it looks needed to clear 'desc'.

So it should also be cleared for the first iteration.

Move the memset() to the beginning of the loop to be safe.

Fixes: 281922a1d4f5 ("crypto: caam - add support for SEC v5.x RNG4")
Signed-off-by: Christophe JAILLET 
Reviewed-by: Gaurav Jain 
Signed-off-by: Herbert Xu

crypto: caam - Remove GFP_DMA and add DMA alignment padding

2023-01-06T09:15:47+00:00

GFP_DMA does not guarantee that the returned memory is aligned
for DMA.  It should be removed where it is superfluous.

However, kmalloc may start returning DMA-unaligned memory in future
so fix this by adding the alignment by hand.

Signed-off-by: Herbert Xu

Merge tag 'v5.19-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

2022-05-28T01:06:49+00:00

Pull crypto updates from Herbert Xu:
 "API:

   - Test in-place en/decryption with two sglists in testmgr

   - Fix process vs softirq race in cryptd

  Algorithms:

   - Add arm64 acceleration for sm4

   - Add s390 acceleration for chacha20

  Drivers:

   - Add polarfire soc hwrng support in mpsf

   - Add support for TI SoC AM62x in sa2ul

   - Add support for ATSHA204 cryptochip in atmel-sha204a

   - Add support for PRNG in caam

   - Restore support for storage encryption in qat

   - Restore support for storage encryption in hisilicon/sec"

* tag 'v5.19-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (116 commits)
  hwrng: omap3-rom - fix using wrong clk_disable() in omap_rom_rng_runtime_resume()
  crypto: hisilicon/sec - delete the flag CRYPTO_ALG_ALLOCATES_MEMORY
  crypto: qat - add support for 401xx devices
  crypto: qat - re-enable registration of algorithms
  crypto: qat - honor CRYPTO_TFM_REQ_MAY_SLEEP flag
  crypto: qat - add param check for DH
  crypto: qat - add param check for RSA
  crypto: qat - remove dma_free_coherent() for DH
  crypto: qat - remove dma_free_coherent() for RSA
  crypto: qat - fix memory leak in RSA
  crypto: qat - add backlog mechanism
  crypto: qat - refactor submission logic
  crypto: qat - use pre-allocated buffers in datapath
  crypto: qat - set to zero DH parameters before free
  crypto: s390 - add crypto library interface for ChaCha20
  crypto: talitos - Uniform coding style with defined variable
  crypto: octeontx2 - simplify the return expression of otx2_cpt_aead_cbc_aes_sha_setkey()
  crypto: cryptd - Protect per-CPU resource by disabling BH.
  crypto: sun8i-ce - do not fallback if cryptlen is less than sg length
  crypto: sun8i-ce - rework debugging
  ...