linux-stable.git/drivers/crypto/caam/ctrl.c, branch linux-3.19.y

crypto: caam: drop owner assignment from platform_drivers

2014-10-20T14:20:25+00:00

A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang

crypto: caam - Dynamic allocation of addresses for various memory blocks in CAAM.

2014-09-15T11:44:11+00:00

CAAM's memory is broken into following address blocks:
Block           Included Registers
0               General Registers
1-4             Job ring registers
6               RTIC registers
7               QI registers
8               DECO and CCB

Size of the above stated blocks varies in various platforms. The block size can be 4K or 64K.
The block size can be dynamically determined by reading CTPR register in CAAM.
This patch initializes the block addresses dynamically based on the value read from this register.

Signed-off-by: Ruchika Gupta 
Signed-off-by: Nitesh Narayan Lal 
Signed-off-by: Herbert Xu

crypto: caam - enable raw data instead of von Neumann data

2014-08-25T12:32:37+00:00

The sampling of the oscillator can be done in multiple modes for
generating the entropy value. By default, this is set to von
Neumann. This patch changes the sampling to raw data, since it
has been discovered that the generated entropy has a better
'quality'.

Signed-off-by: Alex Porosanu 
Signed-off-by: Herbert Xu

crypto: caam - change starting entropy delay value

2014-08-25T12:32:35+00:00

The entropy delay (the length in system clocks of each
entropy sample) for the RNG4 block of CAAM is dependent
on the frequency of the SoC. By elaborate methods, it
has been determined that a good starting value for all
platforms integrating the CAAM IP is 3200. Using a
higher value has additional benefit of  speeding up
the process of instantiating the RNG, since the entropy
delay will be increased and instantiation of the RNG
state handles will be reattempted by the driver. If the
starting value is low, for certain platforms, this can
lead to a quite lengthy process.
This patch changes the starting value of the length of
the entropy sample to 3200 system clocks.
In addition to this change, the attempted entropy delay
values are now printed on the console upon initialization
of the RNG block.
While here, a safeguard for yielding the processor was
added for ensuring that in very adverse cases,
the CPU isn't hogged by the instantiation loop.

Signed-off-by: Alex Porosanu 
Signed-off-by: Herbert Xu

crypto: caam - disable RNG oscillator maximum frequency check

2014-08-25T12:32:34+00:00

The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the
oscillator, when SEC runs at its maximum frequency. For certain platforms
(f.i. T2080), the oscillator is very fast and thus if the SEC runs at
a lower than normal frequency, the ring oscillator is incorrectly detected
as being out of bounds.

This patch effectively disables the maximum frequency check, by setting a
high enough maximum allowable frequency for the oscillator. The reasoning
behind this is that usually a broken oscillator will run too slow
(i.e. not run at all) rather than run too fast.

Signed-off-by: Alex Porosanu 
Signed-off-by: Herbert Xu

crypto: caam - fix DECO RSR polling

2014-07-23T13:31:37+00:00

RSR (Request Source Register) is not used when
virtualization is disabled, thus don't poll for Valid bit.

Besides this, if used, timeout has to be reinitialized.

Signed-off-by: Horia Geanta 
Acked-by: Kim Phillips 
Signed-off-by: Herbert Xu

crypto: caam - set coherent_dma_mask

2014-07-23T13:28:42+00:00

Replace dma_set_mask with dma_set_mask_and_coherent, since both
streaming and coherent DMA mappings are being used.

Signed-off-by: Horia Geanta 
Acked-by: Kim Phillips 
Signed-off-by: Herbert Xu

crypto: caam - Enabling multiple caam debug support for C29x platform

2014-07-08T13:06:36+00:00

In the current setup debug file system enables us to debug the operational
details for only one CAAM. This patch adds the support for debugging multiple
CAAM's.

Signed-off-by: Nitesh Narayan Lal 
Signed-off-by: Vakul Garg 
Signed-off-by: Herbert Xu

crypto: caam - Configuration for platforms with virtualization enabled in CAAM

2014-06-25T13:38:39+00:00

For platforms with virtualization enabled

    1. The job ring registers can be written to only is the job ring has been
       started i.e STARTR bit in JRSTART register is 1

    2. For DECO's under direct software control, with virtualization enabled
       PL, BMT, ICID and SDID values need to be provided. These are provided by
       selecting a Job ring in start mode whose parameters would be used for the
       DECO access programming.

Signed-off-by: Ruchika Gupta 
Signed-off-by: Herbert Xu

crypto: caam - Correct definition of registers in memory map

2014-06-25T13:38:39+00:00

Some registers like SECVID, CHAVID, CHA Revision Number,
CTPR were defined as 64 bit resgisters.  The IP provides
a DWT bit(Double word Transpose) to transpose the two words when
a double word register is accessed. However setting this bit
would also affect the operation of job descriptors as well as
other registers which are truly double word in nature.
So, for the IP to work correctly on big-endian as well as
little-endian SoC's, change is required to access all 32 bit
registers as 32 bit quantities.

Signed-off-by: Ruchika Gupta 
Signed-off-by: Herbert Xu