<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/crypto/Kconfig, branch linux-3.16.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>crypto/nx: disable NX on little endian builds</title>
<updated>2014-06-11T07:03:19+00:00</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2014-06-07T01:33:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8b9f9269bcfb4fe9b44bb52aac1ce796834109fe'/>
<id>8b9f9269bcfb4fe9b44bb52aac1ce796834109fe</id>
<content type='text'>
The NX driver has endian issues so disable it for now.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The NX driver has endian issues so disable it for now.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: s5p-sss - Let Exynos SoCs select SSS driver</title>
<updated>2014-05-08T13:58:14+00:00</updated>
<author>
<name>Naveen Krishna Chatradhi</name>
<email>ch.naveen@samsung.com</email>
</author>
<published>2014-05-08T13:58:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e922e96f2f1a4b5e722d582db9b0d129060a061a'/>
<id>e922e96f2f1a4b5e722d582db9b0d129060a061a</id>
<content type='text'>
This patch modifies Kconfig such that ARCH_EXYNOS SoCs
which includes (Exynos4210, Exynos5250 and Exynos5420)
can also select Samsung SSS(Security SubSystem) driver.

Signed-off-by: Naveen Krishna Chatradhi &lt;ch.naveen@samsung.com&gt;
Reviewed-by: Tomasz Figa &lt;t.figa@samsung.com&gt;
CC: David S. Miller &lt;davem@davemloft.net&gt;
CC: &lt;linux-samsung-soc@vger.kernel.org&gt;
Acked-by: Vladimir Zapolskiy &lt;vz@mleia.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch modifies Kconfig such that ARCH_EXYNOS SoCs
which includes (Exynos4210, Exynos5250 and Exynos5420)
can also select Samsung SSS(Security SubSystem) driver.

Signed-off-by: Naveen Krishna Chatradhi &lt;ch.naveen@samsung.com&gt;
Reviewed-by: Tomasz Figa &lt;t.figa@samsung.com&gt;
CC: David S. Miller &lt;davem@davemloft.net&gt;
CC: &lt;linux-samsung-soc@vger.kernel.org&gt;
Acked-by: Vladimir Zapolskiy &lt;vz@mleia.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: tegra - remove driver</title>
<updated>2014-02-26T21:56:57+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2014-02-18T21:42:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=645af2e43705d8c80c9606d5c5e83eda9a1a1a2e'/>
<id>645af2e43705d8c80c9606d5c5e83eda9a1a1a2e</id>
<content type='text'>
This driver has never been hooked up in any board file, and cannot be
instantiated via device tree. I've been told that, at least on Tegra20,
the HW is slower at crypto than the main CPU. I have no test-case for
it. Hence, remove it.

Cc: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver has never been hooked up in any board file, and cannot be
instantiated via device tree. I've been told that, at least on Tegra20,
the HW is slower at crypto than the main CPU. I have no test-case for
it. Hence, remove it.

Cc: Varun Wadekar &lt;vwadekar@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: omap-des - Add config and build options</title>
<updated>2014-02-26T21:56:57+00:00</updated>
<author>
<name>Joel Fernandes</name>
<email>joelf@ti.com</email>
</author>
<published>2014-02-14T16:49:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=701d0f1940925d40f6b8a40f6c278d14be71402b'/>
<id>701d0f1940925d40f6b8a40f6c278d14be71402b</id>
<content type='text'>
Add config and build options for the omap-des driver.

Signed-off-by: Joel Fernandes &lt;joelf@ti.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add config and build options for the omap-des driver.

Signed-off-by: Joel Fernandes &lt;joelf@ti.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: mxs - Add Freescale MXS DCP driver</title>
<updated>2014-01-05T12:49:54+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2013-12-10T19:26:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=15b59e7c3733f90ff1f7dd66ad77ae1c90bcdff5'/>
<id>15b59e7c3733f90ff1f7dd66ad77ae1c90bcdff5</id>
<content type='text'>
Add support for the MXS DCP block. The driver currently supports
SHA-1/SHA-256 hashing and AES-128 CBC/ECB modes. The non-standard
CRC32 is not yet supported.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Cc: devicetree@vger.kernel.org
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the MXS DCP block. The driver currently supports
SHA-1/SHA-256 hashing and AES-128 CBC/ECB modes. The non-standard
CRC32 is not yet supported.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Cc: devicetree@vger.kernel.org
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: mxs - Remove the old DCP driver</title>
<updated>2014-01-05T12:49:52+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2013-12-10T19:26:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c493c04403769d833864ad5be2ff64dee7567ca7'/>
<id>c493c04403769d833864ad5be2ff64dee7567ca7</id>
<content type='text'>
Remove the old DCP driver as it had multiple severe issues. The driver
will be replaced by a more robust implementation. Here is a short list
of problems with this driver:

1) It only supports AES_CBC
2) The driver was apparently never ran behind anyone working with MXS. ie.:
   -&gt; Restarting the DCP block is not done via mxs_reset_block()
   -&gt; The DT name is not "fsl,dcp" or "fsl,mxs-dcp" as other MXS drivers
3) Introduces new ad-hoc IOCTLs
4) The IRQ handler can't use usual completion() in the driver because that'd
   trigger "scheduling while atomic" oops, yes?

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove the old DCP driver as it had multiple severe issues. The driver
will be replaced by a more robust implementation. Here is a short list
of problems with this driver:

1) It only supports AES_CBC
2) The driver was apparently never ran behind anyone working with MXS. ie.:
   -&gt; Restarting the DCP block is not done via mxs_reset_block()
   -&gt; The DT name is not "fsl,dcp" or "fsl,mxs-dcp" as other MXS drivers
3) Introduces new ad-hoc IOCTLs
4) The IRQ handler can't use usual completion() in the driver because that'd
   trigger "scheduling while atomic" oops, yes?

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: ccp - CCP Kconfig fixes</title>
<updated>2013-12-20T12:06:20+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2013-12-10T16:38:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d5aa80952aba9071b50a74c8daf7feb1caa2fd8c'/>
<id>d5aa80952aba9071b50a74c8daf7feb1caa2fd8c</id>
<content type='text'>
Update the Kconfig to include PCI on the 'depends on'
and add 'select HW_RANDOM' to insure the necessary PCI
and HW_RANDOM functions are available/included in the
build.

Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update the Kconfig to include PCI on the 'depends on'
and add 'select HW_RANDOM' to insure the necessary PCI
and HW_RANDOM functions are available/included in the
build.

Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crytpo: ccp - CCP device driver build files</title>
<updated>2013-12-05T13:28:40+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2013-11-12T17:46:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f114766088f352a47f57307ff927b815e0239644'/>
<id>f114766088f352a47f57307ff927b815e0239644</id>
<content type='text'>
These files provide the ability to configure and build the
AMD CCP device driver and crypto API support.

Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These files provide the ability to configure and build the
AMD CCP device driver and crypto API support.

Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: omap-aes - Kconfig: Add build support for AM437x</title>
<updated>2013-08-21T11:28:06+00:00</updated>
<author>
<name>Joel Fernandes</name>
<email>joelf@ti.com</email>
</author>
<published>2013-08-18T02:42:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1bbf643705c3f85f3fa2325807afae260f755f9a'/>
<id>1bbf643705c3f85f3fa2325807afae260f755f9a</id>
<content type='text'>
For AM437x SoC, ARCH_OMAP2 and ARCH_OMAP3 is not enabled in the defconfig. We
follow same thing as SHA driver, and add depends on ARCH_OMAP2PLUS so that the
config is selectable for AES driver on AM437x SoC builds.

Signed-off-by: Joel Fernandes &lt;joelf@ti.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For AM437x SoC, ARCH_OMAP2 and ARCH_OMAP3 is not enabled in the defconfig. We
follow same thing as SHA driver, and add depends on ARCH_OMAP2PLUS so that the
config is selectable for AES driver on AM437x SoC builds.

Signed-off-by: Joel Fernandes &lt;joelf@ti.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: omap-sham - Add SHA384 and SHA512 Support</title>
<updated>2013-08-01T00:54:00+00:00</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2013-07-26T06:59:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=eaef7e3f3f82923ea175ce4859908bb0d70072f3'/>
<id>eaef7e3f3f82923ea175ce4859908bb0d70072f3</id>
<content type='text'>
Adding support for SHA348 and SHA512 in addition to MD5, SHA1, SHA224
SHA256 that the omap sha module supports.

In order to add the support
- Removed hard coded register offsets and passing offsets from pdata
- Updating Flag offsets so that they can be used for SHA256 and SHA512
- Adding the algo info.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Adding support for SHA348 and SHA512 in addition to MD5, SHA1, SHA224
SHA256 that the omap sha module supports.

In order to add the support
- Removed hard coded register offsets and passing offsets from pdata
- Updating Flag offsets so that they can be used for SHA256 and SHA512
- Adding the algo info.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
</feed>
