<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/counter, branch linux-5.4.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>counter: stm32-lptimer-cnt: fix error handling when enabling</title>
<updated>2025-04-10T12:29:39+00:00</updated>
<author>
<name>Fabrice Gasnier</name>
<email>fabrice.gasnier@foss.st.com</email>
</author>
<published>2025-02-24T17:06:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b7e4d3d7071f03d780d9b3c7107260dc0af12b5b'/>
<id>b7e4d3d7071f03d780d9b3c7107260dc0af12b5b</id>
<content type='text'>
commit 8744dcd4fc7800de2eb9369410470bb2930d4c14 upstream.

In case the stm32_lptim_set_enable_state() fails to update CMP and ARR,
a timeout error is raised, by regmap_read_poll_timeout. It may happen,
when the lptimer runs on a slow clock, and the clock is gated only
few times during the polling.

Badly, when this happen, STM32_LPTIM_ENABLE in CR register has been set.
So the 'enable' state in sysfs wrongly lies on the counter being
correctly enabled, due to CR is read as one in stm32_lptim_is_enabled().

To fix both issues:
- enable the clock before writing CMP, ARR and polling ISR bits. It will
avoid the possible timeout error.
- clear the ENABLE bit in CR and disable the clock in the error path.

Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer")
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Link: https://lore.kernel.org/r/20250224170657.3368236-1-fabrice.gasnier@foss.st.com
Signed-off-by: William Breathitt Gray &lt;wbg@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 8744dcd4fc7800de2eb9369410470bb2930d4c14 upstream.

In case the stm32_lptim_set_enable_state() fails to update CMP and ARR,
a timeout error is raised, by regmap_read_poll_timeout. It may happen,
when the lptimer runs on a slow clock, and the clock is gated only
few times during the polling.

Badly, when this happen, STM32_LPTIM_ENABLE in CR register has been set.
So the 'enable' state in sysfs wrongly lies on the counter being
correctly enabled, due to CR is read as one in stm32_lptim_is_enabled().

To fix both issues:
- enable the clock before writing CMP, ARR and polling ISR bits. It will
avoid the possible timeout error.
- clear the ENABLE bit in CR and disable the clock in the error path.

Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer")
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Link: https://lore.kernel.org/r/20250224170657.3368236-1-fabrice.gasnier@foss.st.com
Signed-off-by: William Breathitt Gray &lt;wbg@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>counter: 104-quad-8: Fix race condition between FLAG and CNTR reads</title>
<updated>2023-05-17T09:35:31+00:00</updated>
<author>
<name>William Breathitt Gray</name>
<email>william.gray@linaro.org</email>
</author>
<published>2023-03-12T23:15:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3b7509b6f5e2d4ee1f7d0de5fdea06950afe5e60'/>
<id>3b7509b6f5e2d4ee1f7d0de5fdea06950afe5e60</id>
<content type='text'>
commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.

The Counter (CNTR) register is 24 bits wide, but we can have an
effective 25-bit count value by setting bit 24 to the XOR of the Borrow
flag and Carry flag. The flags can be read from the FLAG register, but a
race condition exists: the Borrow flag and Carry flag are instantaneous
and could change by the time the count value is read from the CNTR
register.

Since the race condition could result in an incorrect 25-bit count
value, remove support for 25-bit count values from this driver;
hard-coded maximum count values are replaced by a LS7267_CNTR_MAX define
for consistency and clarity.

Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
Cc: &lt;stable@vger.kernel.org&gt; # 6.1.x
Cc: &lt;stable@vger.kernel.org&gt; # 6.2.x
Link: https://lore.kernel.org/r/20230312231554.134858-1-william.gray@linaro.org/
Signed-off-by: William Breathitt Gray &lt;william.gray@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.

The Counter (CNTR) register is 24 bits wide, but we can have an
effective 25-bit count value by setting bit 24 to the XOR of the Borrow
flag and Carry flag. The flags can be read from the FLAG register, but a
race condition exists: the Borrow flag and Carry flag are instantaneous
and could change by the time the count value is read from the CNTR
register.

Since the race condition could result in an incorrect 25-bit count
value, remove support for 25-bit count values from this driver;
hard-coded maximum count values are replaced by a LS7267_CNTR_MAX define
for consistency and clarity.

Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
Cc: &lt;stable@vger.kernel.org&gt; # 6.1.x
Cc: &lt;stable@vger.kernel.org&gt; # 6.2.x
Link: https://lore.kernel.org/r/20230312231554.134858-1-william.gray@linaro.org/
Signed-off-by: William Breathitt Gray &lt;william.gray@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update</title>
<updated>2023-01-18T10:41:24+00:00</updated>
<author>
<name>Fabrice Gasnier</name>
<email>fabrice.gasnier@foss.st.com</email>
</author>
<published>2022-11-23T13:36:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=76740fd8c608062ed314a04f3b429bb1f28f312d'/>
<id>76740fd8c608062ed314a04f3b429bb1f28f312d</id>
<content type='text'>
[ Upstream commit fd5ac974fc25feed084c2d1599d0dddb4e0556bc ]

The ARR (auto reload register) and CMP (compare) registers are
successively written. The status bits to check the update of these
registers are polled together with regmap_read_poll_timeout().
The condition to end the loop may become true, even if one of the register
isn't correctly updated.
So ensure both status bits are set before clearing them.

Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer")
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Link: https://lore.kernel.org/r/20221123133609.465614-1-fabrice.gasnier@foss.st.com/
Signed-off-by: William Breathitt Gray &lt;william.gray@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit fd5ac974fc25feed084c2d1599d0dddb4e0556bc ]

The ARR (auto reload register) and CMP (compare) registers are
successively written. The status bits to check the update of these
registers are polled together with regmap_read_poll_timeout().
The condition to end the loop may become true, even if one of the register
isn't correctly updated.
So ensure both status bits are set before clearing them.

Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer")
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Link: https://lore.kernel.org/r/20221123133609.465614-1-fabrice.gasnier@foss.st.com/
Signed-off-by: William Breathitt Gray &lt;william.gray@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>counter: 104-quad-8: Return error when invalid mode during ceiling_write</title>
<updated>2021-09-15T07:47:34+00:00</updated>
<author>
<name>William Breathitt Gray</name>
<email>vilhelm.gray@gmail.com</email>
</author>
<published>2021-08-03T12:06:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c2451d5439d08ff351a6d07d51ec35d354a3d2df'/>
<id>c2451d5439d08ff351a6d07d51ec35d354a3d2df</id>
<content type='text'>
[ Upstream commit 728246e8f7269ecd35a2c6e6795323e6d8f48db7 ]

The 104-QUAD-8 only has two count modes where a ceiling value makes
sense: Range Limit and Modulo-N. Outside of these two modes, setting a
ceiling value is an invalid operation -- so let's report it as such by
returning -EINVAL.

Fixes: fc069262261c ("counter: 104-quad-8: Add lock guards - generic interface")
Acked-by: Syed Nayyar Waris &lt;syednwaris@gmail.com&gt;
Signed-off-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Link: https://lore.kernel.org/r/a2147f022829b66839a1db5530a7fada47856847.1627990337.git.vilhelm.gray@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 728246e8f7269ecd35a2c6e6795323e6d8f48db7 ]

The 104-QUAD-8 only has two count modes where a ceiling value makes
sense: Range Limit and Modulo-N. Outside of these two modes, setting a
ceiling value is an invalid operation -- so let's report it as such by
returning -EINVAL.

Fixes: fc069262261c ("counter: 104-quad-8: Add lock guards - generic interface")
Acked-by: Syed Nayyar Waris &lt;syednwaris@gmail.com&gt;
Signed-off-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Link: https://lore.kernel.org/r/a2147f022829b66839a1db5530a7fada47856847.1627990337.git.vilhelm.gray@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>counter: stm32-timer-cnt: fix ceiling miss-alignment with reload register</title>
<updated>2021-04-14T06:24:09+00:00</updated>
<author>
<name>Fabrice Gasnier</name>
<email>fabrice.gasnier@foss.st.com</email>
</author>
<published>2021-03-03T17:49:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8732c2df9d15f59b08db28503ca16fec01969b05'/>
<id>8732c2df9d15f59b08db28503ca16fec01969b05</id>
<content type='text'>
commit b14d72ac731753708a7c1a6b3657b9312b6f0042 upstream

Ceiling value may be miss-aligned with what's actually configured into the
ARR register. This is seen after probe as currently the ARR value is zero,
whereas ceiling value is set to the maximum. So:
- reading ceiling reports zero
- in case the counter gets enabled without any prior configuration,
  it won't count.
- in case the function gets set by the user 1st, (priv-&gt;ceiling) is used.

Fix it by getting rid of the cached "priv-&gt;ceiling" variable. Rather use
the ARR register value directly by using regmap read or write when needed.
There should be no drawback on performance as priv-&gt;ceiling isn't used in
performance critical path.
There's also no point in writing ARR while setting function (sms), so
it can be safely removed.

Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder")
Suggested-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Acked-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Link: https://lore.kernel.org/r/1614793789-10346-1-git-send-email-fabrice.gasnier@foss.st.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
[sudip: adjuct context]
Signed-off-by: Sudip Mukherjee &lt;sudipm.mukherjee@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit b14d72ac731753708a7c1a6b3657b9312b6f0042 upstream

Ceiling value may be miss-aligned with what's actually configured into the
ARR register. This is seen after probe as currently the ARR value is zero,
whereas ceiling value is set to the maximum. So:
- reading ceiling reports zero
- in case the counter gets enabled without any prior configuration,
  it won't count.
- in case the function gets set by the user 1st, (priv-&gt;ceiling) is used.

Fix it by getting rid of the cached "priv-&gt;ceiling" variable. Rather use
the ARR register value directly by using regmap read or write when needed.
There should be no drawback on performance as priv-&gt;ceiling isn't used in
performance critical path.
There's also no point in writing ARR while setting function (sms), so
it can be safely removed.

Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder")
Suggested-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Acked-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Link: https://lore.kernel.org/r/1614793789-10346-1-git-send-email-fabrice.gasnier@foss.st.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
[sudip: adjuct context]
Signed-off-by: Sudip Mukherjee &lt;sudipm.mukherjee@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>counter: stm32-timer-cnt: fix ceiling write max value</title>
<updated>2021-03-24T10:26:43+00:00</updated>
<author>
<name>Fabrice Gasnier</name>
<email>fabrice.gasnier@foss.st.com</email>
</author>
<published>2021-03-02T14:43:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=796fc331c3cf1391bffbf97e590f8026963ff057'/>
<id>796fc331c3cf1391bffbf97e590f8026963ff057</id>
<content type='text'>
commit e4c3e133294c0a292d21073899b05ebf530169bd upstream.

The ceiling value isn't checked before writing it into registers. The user
could write a value higher than the counter resolution (e.g. 16 or 32 bits
indicated by max_arr). This makes most significant bits to be truncated.
Fix it by checking the max_arr to report a range error [1] to the user.

[1] https://lkml.org/lkml/2021/2/12/358

Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder")
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Acked-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Link: https://lore.kernel.org/r/1614696235-24088-1-git-send-email-fabrice.gasnier@foss.st.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit e4c3e133294c0a292d21073899b05ebf530169bd upstream.

The ceiling value isn't checked before writing it into registers. The user
could write a value higher than the counter resolution (e.g. 16 or 32 bits
indicated by max_arr). This makes most significant bits to be truncated.
Fix it by checking the max_arr to report a range error [1] to the user.

[1] https://lkml.org/lkml/2021/2/12/358

Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder")
Signed-off-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Acked-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Link: https://lore.kernel.org/r/1614696235-24088-1-git-send-email-fabrice.gasnier@foss.st.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>counter: stm32-timer-cnt: Report count function when SLAVE_MODE_DISABLED</title>
<updated>2021-03-24T10:26:40+00:00</updated>
<author>
<name>William Breathitt Gray</name>
<email>vilhelm.gray@gmail.com</email>
</author>
<published>2021-02-26T01:29:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b891d41d01f4629c3534263c28686344191223b7'/>
<id>b891d41d01f4629c3534263c28686344191223b7</id>
<content type='text'>
[ Upstream commit fae6f62e6a580b663ecf42c2120a0898deae9137 ]

When in SLAVE_MODE_DISABLED mode, the count still increases if the
counter is enabled because an internal clock is used. This patch fixes
the stm32_count_function_get() and stm32_count_function_set() functions
to properly handle this behavior.

Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder")
Cc: Fabrice Gasnier &lt;fabrice.gasnier@st.com&gt;
Cc: Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@st.com&gt;
Signed-off-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Reviewed-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Link: https://lore.kernel.org/r/20210226012931.161429-1-vilhelm.gray@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit fae6f62e6a580b663ecf42c2120a0898deae9137 ]

When in SLAVE_MODE_DISABLED mode, the count still increases if the
counter is enabled because an internal clock is used. This patch fixes
the stm32_count_function_get() and stm32_count_function_set() functions
to properly handle this behavior.

Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder")
Cc: Fabrice Gasnier &lt;fabrice.gasnier@st.com&gt;
Cc: Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@st.com&gt;
Signed-off-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Reviewed-by: Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;
Link: https://lore.kernel.org/r/20210226012931.161429-1-vilhelm.gray@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>counter: 104-quad-8: Add lock guards - generic interface</title>
<updated>2020-05-02T06:48:44+00:00</updated>
<author>
<name>Syed Nayyar Waris</name>
<email>syednwaris@gmail.com</email>
</author>
<published>2020-03-16T12:49:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1f107e441bde6794a7b3bc534823770c7e6911b4'/>
<id>1f107e441bde6794a7b3bc534823770c7e6911b4</id>
<content type='text'>
commit fc069262261c43ed11d639dadcf982e79bfe652b upstream.

Add lock protection from race conditions to 104-quad-8 counter driver
generic interface code changes. Mutex calls used for protection.

Fixes: f1d8a071d45b ("counter: 104-quad-8: Add Generic Counter interface support")

Signed-off-by: Syed Nayyar Waris &lt;syednwaris@gmail.com&gt;
Signed-off-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit fc069262261c43ed11d639dadcf982e79bfe652b upstream.

Add lock protection from race conditions to 104-quad-8 counter driver
generic interface code changes. Mutex calls used for protection.

Fixes: f1d8a071d45b ("counter: 104-quad-8: Add Generic Counter interface support")

Signed-off-by: Syed Nayyar Waris &lt;syednwaris@gmail.com&gt;
Signed-off-by: William Breathitt Gray &lt;vilhelm.gray@gmail.com&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>counter/ftm-quaddec: Use device-managed registration API</title>
<updated>2019-07-27T21:55:27+00:00</updated>
<author>
<name>Chuhong Yuan</name>
<email>hslester96@gmail.com</email>
</author>
<published>2019-07-26T13:39:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3e4dabacf967535e87bb1b254c08471a2148faea'/>
<id>3e4dabacf967535e87bb1b254c08471a2148faea</id>
<content type='text'>
Make use of devm_counter_register.
Then we can remove redundant unregistration API
usage to make code simpler.

Signed-off-by: Chuhong Yuan &lt;hslester96@gmail.com&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Make use of devm_counter_register.
Then we can remove redundant unregistration API
usage to make code simpler.

Signed-off-by: Chuhong Yuan &lt;hslester96@gmail.com&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'staging-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging</title>
<updated>2019-07-11T22:36:02+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-07-11T22:36:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e786741ff1b52769b044b7f4407f39cd13ee5d2d'/>
<id>e786741ff1b52769b044b7f4407f39cd13ee5d2d</id>
<content type='text'>
Pull staging and IIO driver updates from Greg KH:
 "Here is the big Staging and IIO driver update for 5.3-rc1.

  Lots of new IIO drivers are in here, along with loads of tiny staging
  driver cleanups and fixes. Overall we almost break even with the same
  lines added as removed.

  Full details are in the shortlog, they are too large to list here.

  All of these changes have been in linux-next for a while with no
  reported issues"

* tag 'staging-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (608 commits)
  staging: kpc2000: simplify comparison to NULL in fileops.c
  staging: kpc2000: simplify comparison to NULL in dma.c
  staging: kpc2000: simplify comparison to NULL in kpc2000_spi.c
  staging: rtl8723bs: hal: remove redundant assignment to packetType
  staging: rtl8723bs: Change return type of hal_btcoex_IsBtDisabled()
  staging: rtl8723bs: Remove rtw_btcoex_DisplayBtCoexInfo()
  staging: rtl8723bs: Remove function rtw_btcoex_GetDBG()
  staging: rtl8723bs: Remove function rtw_btcoex_SetDBG()
  staging: rtl8723bs: Remove rtw_btcoex_IsBTCoexCtrlAMPDUSize()
  staging: rtl8723bs: Remove rtw_btcoex_BtInfoNotify()
  staging: rtl8723bs: Remove rtw_btcoex_ScanNotify()
  staging: rtl8723bs: Remove rtw_btcoex_SetSingleAntPath()
  staging: rtl8723bs: Remove rtw_btcoex_SetPGAntNum()
  staging: rtl8192e: remove redundant initialization of rtstatus
  staging: rtl8723bs: Remove rtw_btcoex_GetRaMask()
  staging: rtl8723bs: Remove rtw_btcoex_SetChipType()
  staging: rtl8723bs: Remove rtw_btcoex_ConnectNotify()
  staging: rtl8723bs: Remove rtw_btcoex_SetBTCoexist()
  staging: rtl8723bs: Remove rtw_btcoex_IsBtDisabled()
  staging: rtl8723bs: Remove rtw_btcoex_IsBtControlLps()
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull staging and IIO driver updates from Greg KH:
 "Here is the big Staging and IIO driver update for 5.3-rc1.

  Lots of new IIO drivers are in here, along with loads of tiny staging
  driver cleanups and fixes. Overall we almost break even with the same
  lines added as removed.

  Full details are in the shortlog, they are too large to list here.

  All of these changes have been in linux-next for a while with no
  reported issues"

* tag 'staging-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (608 commits)
  staging: kpc2000: simplify comparison to NULL in fileops.c
  staging: kpc2000: simplify comparison to NULL in dma.c
  staging: kpc2000: simplify comparison to NULL in kpc2000_spi.c
  staging: rtl8723bs: hal: remove redundant assignment to packetType
  staging: rtl8723bs: Change return type of hal_btcoex_IsBtDisabled()
  staging: rtl8723bs: Remove rtw_btcoex_DisplayBtCoexInfo()
  staging: rtl8723bs: Remove function rtw_btcoex_GetDBG()
  staging: rtl8723bs: Remove function rtw_btcoex_SetDBG()
  staging: rtl8723bs: Remove rtw_btcoex_IsBTCoexCtrlAMPDUSize()
  staging: rtl8723bs: Remove rtw_btcoex_BtInfoNotify()
  staging: rtl8723bs: Remove rtw_btcoex_ScanNotify()
  staging: rtl8723bs: Remove rtw_btcoex_SetSingleAntPath()
  staging: rtl8723bs: Remove rtw_btcoex_SetPGAntNum()
  staging: rtl8192e: remove redundant initialization of rtstatus
  staging: rtl8723bs: Remove rtw_btcoex_GetRaMask()
  staging: rtl8723bs: Remove rtw_btcoex_SetChipType()
  staging: rtl8723bs: Remove rtw_btcoex_ConnectNotify()
  staging: rtl8723bs: Remove rtw_btcoex_SetBTCoexist()
  staging: rtl8723bs: Remove rtw_btcoex_IsBtDisabled()
  staging: rtl8723bs: Remove rtw_btcoex_IsBtControlLps()
  ...
</pre>
</div>
</content>
</entry>
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