Pull Qualcomm clock driver fixes from Bjorn Andersson:

 - Fix the Eliza display clock controller to avoid RCG stall.
   Revert the rework of the "PHY mux" clock, as this broke PCIe
   on several different targets
 - Drop (and correct one) bouncing maintainer email addresses in
   Qualcomm clk DeviceTree bindings

* tag 'qcom-clk-fixes-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  dt-bindings: clock: Replace bouncing emails
  Revert "clk: qcom: regmap-phy-mux: Rework the implementation"
  clk: qcom: dispcc-eliza: Fix disp_cc_mdss_mdp_clk_src RCG stall on Eliza EVK

Pull a Rockchip clk driver fix from Heiko Stuebner:

 - Fix for the recently added Rockchip rk3588 i2s clocks, to make
   it backwards compatible with the existing devicetrees

* tag 'v7.2-rockchip-clkfixes1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3588: don't disable unused I2S MCLK output gates

Pull RISC-V SpacemiT clock fixes for v7.2 from Yixun Lan:

 - Fix SpacemiT USB2 bus clock
 - Fix SpacemiT HDMA clock

* tag 'spacemit-clk-fixes-for-7.2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux:
  clk: spacemit: k3: set hdma clock as critical
  clk: spacemit: k3: fix USB2 bus clock

This reverts commit e108373c54fbc844b7f541c6fd7ecb31772afd3c.

This has been reported to break PCIe on at least SM8350 and Eliza
platforms. I had originally tested this on Hamoa (X1E) where there were
no adverse effects. It's highly likely that this stems from a
difference in how the bootloader configures the clocks.

Revert the offending change to fix the issue in the immediate, with the
intent to revisit it in the upcoming cycle.

Reported-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reported-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Fixes: e108373c54fb ("clk: qcom: regmap-phy-mux: Rework the implementation")
Closes: https://lore.kernel.org/all/c675lcfptr4xgg4hcjp66unmuozgsvgwvtymh7on6jcipjrdw7@jy4h7fkwqwjg/
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260622-topic-phymux_revert-v1-1-f6ec85523840@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

HDMA clock is responsible for the internal TCM access path of X100 RISC-V
core, so set the clock flag as critical to prevent it from being shut off,
otherwise the Linux system will hang, for example in the case of a vector
instruction access generates a page fault.

Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
Reported-by: Han Gao <gaohan@iscas.ac.cn>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Link: https://patch.msgid.link/20260630-06-clk-hdma-critial-v1-1-443c0ac88c5f@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>

Replace the #include of <linux/mod_devicetable.h> by the more specific
<linux/device-id/*.h> where applicable. For most cases the include
can be dropped completely, only a few drivers need one or two headers
added.

Acked-by: Danilo Krummrich <dakr@kernel.org>
Acked-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>

According to SpacemiT K3's updated docs, the USB2 ahb reset and USB2 bus
clock enable bit was wrongly swapped, the correct one should be:

Register : APMU_USB_CLK_RES_CTRL
bit[1]   : usb2_port_bus_clk_en
bit[0]   : usb2_port_ahb_rstn

Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
Reported-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
Link: https://patch.msgid.link/20260518-06-clk-reset-usb-fix-v1-1-14fc235e692b@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>

Eliza EVK (eliza-cqs-evk.dts) does not have display enabled, however its
Display Clock Controller is enabled and references parent clocks from
DSI PHYs, which causes clock reparenting issues during probe (init) and
warning on Eliza EVK:

  disp_cc_mdss_mdp_clk_src: rcg didn't update its configuration.
  WARNING: drivers/clk/qcom/clk-rcg2.c:136 at update_config+0xd4/0xe4, CPU#1: udevd/273
  ...
    update_config (drivers/clk/qcom/clk-rcg2.c:136 (discriminator 2)) (P)
    clk_rcg2_shared_disable (drivers/clk/qcom/clk-rcg2.c:1471)
    clk_rcg2_shared_init (drivers/clk/qcom/clk-rcg2.c:1540)
    __clk_register (drivers/clk/clk.c:3959 drivers/clk/clk.c:4368)
    devm_clk_hw_register (drivers/clk/clk.c:4448 (discriminator 1) drivers/clk/clk.c:4672 (discriminator 1))
    devm_clk_register_regmap (drivers/clk/qcom/clk-regmap.c:104)
    qcom_cc_really_probe (drivers/clk/qcom/common.c:418)
    qcom_cc_probe (drivers/clk/qcom/common.c:445)
    disp_cc_eliza_probe (dispcc-eliza.c:?) dispcc_eliza
    platform_probe (drivers/base/platform.c:1432)

Fixes: 0e66f10942b5 ("clk: qcom: dispcc-eliza: Add Eliza display clock controller support")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260623115644.392477-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

No in-tree board references these gates yet. Boards drive the codec
MCLK through the parent I2S*_8CH_MCLKOUT, and now that the gates are
managed clocks, clk_disable_unused() turns them off at boot. On a board
that relied on firmware leaving the output enabled, that cuts the MCLK
and analog audio stops working.

Mark the four gates CLK_IGNORE_UNUSED so an unreferenced gate keeps the
state firmware left. A board that wants the kernel to own the gate can
reference I2S*_8CH_MCLKOUT_TO_IO from DT instead.

Fixes: 02b9b0bb6269 ("clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO")
Reported-by: Diederik de Haas <diederik@cknow-tech.com>
Closes: https://lore.kernel.org/linux-rockchip/DJGDSS875DDO.22TYPVYK5X8KZ@cknow-tech.com/
Tested-by: Diederik de Haas <diederik@cknow-tech.com>
Signed-off-by: Daniele Briguglio <hello@superkali.me>
Tested-by: Ricardo Pardini <ricardo@pardini.net> # on R58X-Pro+NanoPC-T6
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://patch.msgid.link/20260624123914.1767374-1-hello@superkali.me
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Pull clk updates from Stephen Boyd:
 "This is all clk driver updates. Mostly new SoC support for various
  Qualcomm chips and Canaan K230. Otherwise there's non-critical fixes
  and updates to clk data such as adding missing clks to existing
  drivers or marking clks critical. Nothing looks especially exciting"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (106 commits)
  clk: qcom: regmap-phy-mux: Rework the implementation
  clk: qcom: a53: Corrected frequency multiplier for 1152MHz
  clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC
  clk: qcom: gdsc: Support enabling interconnect path for power domain
  dt-bindings: clock: qcom,milos-camcc: Document interconnect path
  interconnect: Add devm_of_icc_get_by_index() as exported API for users
  clk: qcom: camcc-x1p42100: Add support for camera clock controller
  clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks
  clk: qcom: videocc-x1p42100: Add support for video clock controller
  dt-bindings: clock: qcom: Add X1P42100 camera clock controller
  dt-bindings: clock: qcom: Add X1P42100 video clock controller
  clk: keystone: sci-clk: fix application of sizeof to pointer
  clk: keystone: don't cache clock rate
  clk: spacemit: k3: Add PCIe DBI clock
  dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs
  clk: spacemit: k3: Fix PCIe clock register offset
  clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock
  clk: at91: keep securam node alive while mapping it
  clk: samsung: exynos990: Fix PERIC0/1 USI clock types
  clk: renesas: r9a08g045: Drop unused pm_domain header file
  ...