linux-stable.git/drivers/clk, branch v5.16.2

clk: Don't parent clks until the parent is fully registered

2021-12-08T03:20:35+00:00

Before commit fc0c209c147f ("clk: Allow parents to be specified without
string names") child clks couldn't find their parent until the parent
clk was added to a list in __clk_core_init(). After that commit, child
clks can reference their parent clks directly via a clk_hw pointer, or
they can lookup that clk_hw pointer via DT if the parent clk is
registered with an OF clk provider.

The common clk framework treats hw->core being non-NULL as "the clk is
registered" per the logic within clk_core_fill_parent_index():

	parent = entry->hw->core;
	/*
	 * We have a direct reference but it isn't registered yet?
	 * Orphan it and let clk_reparent() update the orphan status
	 * when the parent is registered.
	 */
	if (!parent)

Therefore we need to be extra careful to not set hw->core until the clk
is fully registered with the clk framework. Otherwise we can get into a
situation where a child finds a parent clk and we move the child clk off
the orphan list when the parent isn't actually registered, wrecking our
enable accounting and breaking critical clks.

Consider the following scenario:

  CPU0                                     CPU1
  ----                                     ----
  struct clk_hw clkBad;
  struct clk_hw clkA;

  clkA.init.parent_hws = { &clkBad };

  clk_hw_register(&clkA)                   clk_hw_register(&clkBad)
   ...                                      __clk_register()
					     hw->core = core
					     ...
   __clk_register()
    __clk_core_init()
     clk_prepare_lock()
     __clk_init_parent()
      clk_core_get_parent_by_index()
       clk_core_fill_parent_index()
        if (entry->hw) {
	 parent = entry->hw->core;

At this point, 'parent' points to clkBad even though clkBad hasn't been
fully registered yet. Ouch! A similar problem can happen if a clk
controller registers orphan clks that are referenced in the DT node of
another clk controller.

Let's fix all this by only setting the hw->core pointer underneath the
clk prepare lock in __clk_core_init(). This way we know that
clk_core_fill_parent_index() can't see hw->core be non-NULL until the
clk is fully registered.

Fixes: fc0c209c147f ("clk: Allow parents to be specified without string names")
Signed-off-by: Mike Tipton 
Link: https://lore.kernel.org/r/20211109043438.4639-1-quic_mdtipton@quicinc.com
[sboyd@kernel.org: Reword commit text, update comment]
Signed-off-by: Stephen Boyd

clk: versatile: clk-icst: use after free on error path

2021-12-07T20:25:29+00:00

This frees "name" and then tries to display in as part of the error
message on the next line.  Swap the order.

Fixes: 1b2189f3aa50 ("clk: versatile: clk-icst: Ensure clock names are unique")
Signed-off-by: Dan Carpenter 
Link: https://lore.kernel.org/r/20211117072604.GC5237@kili
Reviewed-by: Linus Walleij 
Signed-off-by: Stephen Boyd

clk: qcom: sm6125-gcc: Swap ops of ice and apps on sdcc1

2021-12-06T22:40:38+00:00

Without this change eMMC runs at overclocked freq.
Swap the ops to not OC the eMMC.

Signed-off-by: Martin Botka 
Link: https://lore.kernel.org/r/20211130212015.25232-1-martin.botka@somainline.org
Reviewed-by: Bjorn Andersson 
Fixes: 4b8d6ae57cdf ("clk: qcom: Add SM6125 (TRINKET) GCC driver")
Signed-off-by: Stephen Boyd

clk: imx: use module_platform_driver

2021-12-03T01:57:24+00:00

Replace builtin_platform_driver_probe with module_platform_driver_probe
because CONFIG_CLK_IMX8QXP can be set to =m (kernel module).

Fixes: e0d0d4d86c766 ("clk: imx8qxp: Support building i.MX8QXP clock driver as module")
Cc: Fabio Estevam 
Cc: Stephen Boyd 
Signed-off-by: Miles Chen 
Link: https://lore.kernel.org/r/20210904235418.2442-1-miles.chen@mediatek.com
Reviewed-by: Fabio Estevam 
Reviewed-by: Stephen Boyd 
Signed-off-by: Stephen Boyd

clk: qcom: clk-alpha-pll: Don't reconfigure running Trion

2021-12-03T00:59:12+00:00

In the event that the bootloader has configured the Trion PLL as source
for the display clocks, e.g. for the continuous splashscreen, then there
will also be RCGs that are clocked by this instance.

Reconfiguring, and in particular disabling the output of, the PLL will
cause issues for these downstream RCGs and has been shown to prevent
them from being re-parented.

Follow downstream and skip configuration if it's determined that the PLL
is already running.

Fixes: 59128c20a6a9 ("clk: qcom: clk-alpha-pll: Add support for controlling Lucid PLLs")
Signed-off-by: Bjorn Andersson 
Reviewed-by: Robert Foss 
Reviewed-by: Vinod Koul 
Link: https://lore.kernel.org/r/20211123162508.153711-1-bjorn.andersson@linaro.org
Signed-off-by: Stephen Boyd

clk: qcom: regmap-mux: fix parent clock lookup

2021-12-02T23:07:34+00:00

The function mux_get_parent() uses qcom_find_src_index() to find the
parent clock index, which is incorrect: qcom_find_src_index() uses src
enum for the lookup, while mux_get_parent() should use cfg field (which
corresponds to the register value). Add qcom_find_cfg_index() function
doing this kind of lookup and use it for mux parent lookup.

Fixes: df964016490b ("clk: qcom: add parent map for regmap mux")
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Baryshkov 
Link: https://lore.kernel.org/r/20211115233407.1046179-1-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd

Merge tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2021-11-14T19:11:51+00:00

Pull devicetree fixes from Rob Herring:

 - Two fixes due to DT node name changes on Arm, Ltd. boards

 - Treewide rename of Ingenic CGU headers

 - Update ST email addresses

 - Remove Netlogic DT bindings

 - Dropping few more cases of redundant 'maxItems' in schemas

 - Convert toshiba,tc358767 bridge binding to schema

* tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: watchdog: sunxi: fix error in schema
  bindings: media: venus: Drop redundant maxItems for power-domain-names
  dt-bindings: Remove Netlogic bindings
  clk: versatile: clk-icst: Ensure clock names are unique
  of: Support using 'mask' in making device bus id
  dt-bindings: treewide: Update @st.com email address to @foss.st.com
  dt-bindings: media: Update maintainers for st,stm32-hwspinlock.yaml
  dt-bindings: media: Update maintainers for st,stm32-cec.yaml
  dt-bindings: mfd: timers: Update maintainers for st,stm32-timers
  dt-bindings: timer: Update maintainers for st,stm32-timer
  dt-bindings: i2c: imx: hardware do not restrict clock-frequency to only 100 and 400 kHz
  dt-bindings: display: bridge: Convert toshiba,tc358767.txt to yaml
  dt-bindings: Rename Ingenic CGU headers to ingenic,*.h

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2021-11-13T21:07:29+00:00

Pull more clk updates from Stephen Boyd:
 "This is the second batch of clk driver updates that needed a little
  more time to soak in linux-next.

   - Use modern i2c probe in vc5

   - Cleanup some includes

   - Update links to datasheets

   - Add UniPhier NX1 SoC clk support

   - Fix DT bindings for SiFive FU740

   - Revert the module platform driver support for Rockchip because it
     wasn't actually tested

   - Fix the composite clk code again as the previous fix had a one line
     bug that broke rate changes for clks that want to use the same
     parent still

   - Use the right table for a divider in ast2600 driver

   - Get rid of gcc_aggre1_pnoc_ahb_clk in qcom clk driver again because
     its critical but unused"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: qcom: gcc-msm8996: Drop (again) gcc_aggre1_pnoc_ahb_clk
  clk: imx8m: Do not set IMX_COMPOSITE_CORE for non-regular composites
  clk/ast2600: Fix soc revision for AHB
  clk: composite: Fix 'switching' to same clock
  clk: rockchip: drop module parts from rk3399 and rk3568 drivers
  Revert "clk: rockchip: use module_platform_driver_probe"
  clk:mediatek: remove duplicate include in clk-mt8195-imp_iic_wrap.c
  dt-bindings: clock: fu740-prci: add reset-cells
  clk: uniphier: Add SoC-glue clock source selector support for Pro4
  dt-bindings: clock: uniphier: Add clock binding for SoC-glue
  clk: uniphier: Add NX1 clock support
  dt-bindings: clock: uniphier: Add NX1 clock binding
  clk: uniphier: Add audio system and video input clock control for PXs3
  clk: si5351: Update datasheet references
  clk: vc5: Use i2c .probe_new
  clk/actions/owl-factor.c: remove superfluous headers
  clk: ingenic: Fix bugs with divided dividers

clk: versatile: clk-icst: Ensure clock names are unique

2021-11-12T04:27:16+00:00

Commit 2d3de197a818 ("ARM: dts: arm: Update ICST clock nodes 'reg' and
node names") moved to using generic node names. That results in trying
to register multiple clocks with the same name. Fix this by including
the unit-address in the clock name.

Fixes: 2d3de197a818 ("ARM: dts: arm: Update ICST clock nodes 'reg' and node names")
Cc: stable@vger.kernel.org
Cc: Linus Walleij 
Cc: Stephen Boyd 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-clk@vger.kernel.org
Signed-off-by: Rob Herring 
Reviewed-by: Stephen Boyd 
Reviewed-by: Linus Walleij 
Link: https://lore.kernel.org/r/20211109164650.2233507-3-robh@kernel.org

dt-bindings: Rename Ingenic CGU headers to ingenic,*.h

2021-11-12T04:27:14+00:00

Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.

Signed-off-by: Paul Cercueil 
Acked-by: Rob Herring 
Acked-by: Stephen Boyd 
Signed-off-by: Rob Herring 
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net