linux-stable.git/drivers/clk, branch v5.0.4

clk: ingenic: Fix doc of ingenic_cgu_div_info

2019-03-23T19:11:29+00:00

commit 7ca4c922aad2e3c46767a12f80d01c6b25337b59 upstream.

The 'div' field does not represent a number of bits used to divide
(understand: right-shift) the divider, but a number itself used to
divide the divider.

Signed-off-by: Paul Cercueil 
Signed-off-by: Maarten ter Huurne 
Cc: 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: ingenic: Fix round_rate misbehaving with non-integer dividers

2019-03-23T19:11:29+00:00

commit bc5d922c93491878c44c9216e9d227c7eeb81d7f upstream.

Take a parent rate of 180 MHz, and a requested rate of 4.285715 MHz.
This results in a theorical divider of 41.999993 which is then rounded
up to 42. The .round_rate function would then return (180 MHz / 42) as
the clock, rounded down, so 4.285714 MHz.

Calling clk_set_rate on 4.285714 MHz would round the rate again, and
give a theorical divider of 42,0000028, now rounded up to 43, and the
rate returned would be (180 MHz / 43) which is 4.186046 MHz, aka. not
what we requested.

Fix this by rounding up the divisions.

Signed-off-by: Paul Cercueil 
Tested-by: Maarten ter Huurne 
Cc: 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: samsung: exynos5: Fix kfree() of const memory on setting driver_override

2019-03-23T19:11:29+00:00

commit 785c9f411eb2d9a6076d3511c631587d5e676bf3 upstream.

Platform driver driver_override field should not be initialized from
const memory because the core later kfree() it.  If driver_override is
manually set later through sysfs, kfree() of old value leads to:

    $ echo "new_value" > /sys/bus/platform/drivers/.../driver_override

    kernel BUG at ../mm/slub.c:3960!
    Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
    ...
    (kfree) from [] (platform_set_driver_override+0x84/0xac)
    (platform_set_driver_override) from [] (driver_override_store+0x20/0x34)
    (driver_override_store) from [] (kernfs_fop_write+0x100/0x1dc)
    (kernfs_fop_write) from [] (__vfs_write+0x2c/0x17c)
    (__vfs_write) from [] (vfs_write+0xa4/0x188)
    (vfs_write) from [] (ksys_write+0x4c/0xac)
    (ksys_write) from [] (ret_fast_syscall+0x0/0x28)

The clk-exynos5-subcmu driver uses override only for the purpose of
creating meaningful names for children devices (matching names of power
domains, e.g. DISP, MFC).  The driver_override was not developed for
this purpose so just switch to default names of devices to fix the
issue.

Fixes: b06a532bf1fa ("clk: samsung: Add Exynos5 sub-CMU clock driver")
Cc: 
Signed-off-by: Krzysztof Kozlowski 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: samsung: exynos5: Fix possible NULL pointer exception on platform_device_alloc() failure

2019-03-23T19:11:29+00:00

commit 5f0b6216ea381b43c0dff88702d6cc5673d63922 upstream.

During initialization of subdevices if platform_device_alloc() failed,
returned NULL pointer will be later dereferenced.  Add proper error
paths to exynos5_clk_register_subcmu().  The return value of this
function is still ignored because at this stage of init there is nothing
we can do.

Fixes: b06a532bf1fa ("clk: samsung: Add Exynos5 sub-CMU clock driver")
Cc: 
Signed-off-by: Krzysztof Kozlowski 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: clk-twl6040: Fix imprecise external abort for pdmclk

2019-03-23T19:11:29+00:00

commit 5ae51d67aec95f6f9386aa8dd5db424964895575 upstream.

I noticed that modprobe clk-twl6040 can fail after a cold boot with:
abe_cm:clk:0010:0: failed to enable
...
Unhandled fault: imprecise external abort (0x1406) at 0xbe896b20

WARNING: CPU: 1 PID: 29 at drivers/clk/clk.c:828 clk_core_disable_lock+0x18/0x24
...
(clk_core_disable_lock) from [] (_disable_clocks+0x18/0x90)
(_disable_clocks) from [] (_idle+0x17c/0x244)
(_idle) from [] (omap_hwmod_idle+0x24/0x44)
(omap_hwmod_idle) from [] (sysc_runtime_suspend+0x48/0x108)
(sysc_runtime_suspend) from [] (__rpm_callback+0x144/0x1d8)
(__rpm_callback) from [] (rpm_callback+0x20/0x80)
(rpm_callback) from [] (rpm_suspend+0x120/0x694)
(rpm_suspend) from [] (__pm_runtime_idle+0x60/0x84)
(__pm_runtime_idle) from [] (sysc_probe+0x874/0xf2c)
(sysc_probe) from [] (platform_drv_probe+0x48/0x98)

After searching around for a similar issue, I came across an earlier fix
that never got merged upstream in the Android tree for glass-omap-xrr02.
There is patch "MFD: twl6040-codec: Implement PDMCLK cold temp errata"
by Misael Lopez Cruz .

Based on my observations, this fix is also needed when cold booting
devices, and not just for deeper idle modes. Since we now have a clock
driver for pdmclk, let's fix the issue in twl6040_pdmclk_prepare().

Cc: Misael Lopez Cruz 
Cc: Peter Ujfalusi 
Signed-off-by: Tony Lindgren 
Acked-by: Peter Ujfalusi 
Cc: 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: uniphier: Fix update register for CPU-gear

2019-03-23T19:11:28+00:00

commit 521282237b9d78b9bff423ec818becd4c95841c2 upstream.

Need to set the update bit in UNIPHIER_CLK_CPUGEAR_UPD to update
the CPU-gear value.

Fixes: d08f1f0d596c ("clk: uniphier: add CPU-gear change (cpufreq) support")
Cc: linux-stable@vger.kernel.org
Signed-off-by: Kunihiko Hayashi 
Acked-by: Masahiro Yamada 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: at91: fix masterck name

2019-02-20T19:40:21+00:00

The master clock is actually named masterck earlier in the driver. Having
"mck" in the parent list means that it can never be selected.

Fixes: 1eabdc2f9dd8 ("clk: at91: add at91sam9x5 PMCs driver")
Fixes: a2038077de9a ("clk: at91: add sama5d2 PMC driver")
Fixes: 084b696bb509 ("clk: at91: add sama5d4 pmc driver")
Signed-off-by: Alexandre Belloni 
Acked-by: Nicolas Ferre 
Cc:  # v4.20+
Signed-off-by: Stephen Boyd

clk: at91: fix at91sam9x5 peripheral clock number

2019-02-20T19:34:24+00:00

nck() looks at the last id in an array and unfortunately,
at91sam9x35_periphck has a sentinel, hence the id is 0 and the calculated
number of peripheral clocks is 1 instead of a maximum of 31.

Fixes: 1eabdc2f9dd8 ("clk: at91: add at91sam9x5 PMCs driver")
Signed-off-by: Alexandre Belloni 
Acked-by: Nicolas Ferre 
Cc:  # v4.20+
Signed-off-by: Stephen Boyd

Merge tag 'sunxi-clk-fixes-for-5.0' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes

2019-02-13T17:01:21+00:00

Pull Allwinner clock fixes from Maxime Ripard:

Two fixes for clock indices, one for the A31 and one for the V3s.

* tag 'sunxi-clk-fixes-for-5.0' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi: A31: Fix wrong AHB gate number
  clk: sunxi-ng: v3s: Fix TCON reset de-assert bit

clk: sunxi: A31: Fix wrong AHB gate number

2019-01-28T08:26:32+00:00

According to the manual the gate clock for MMC3 is at bit 11, and NAND1
is controlled by bit 12.

Fix the gate bit definitions in the clock driver.

Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Andre Przywara 
Signed-off-by: Maxime Ripard