linux-stable.git/drivers/clk, branch v4.1.26

clk: rockchip: add hclk_cpubus to the list of rk3188 critical clocks

2016-04-18T12:50:33+00:00

[ Upstream commit e8b63288b37dbb8457b510c9d96f6006da4653f6 ]

hclk_cpubus needs to keep running because it is needed for devices like
the rom, i2s0 or spdif to be accessible via cpu. Without that all
accesses to devices (readl/writel) return wrong data. So add it
to the list of critical clocks.

Fixes: 78eaf6095cc763c ("clk: rockchip: disable unused clocks")
Signed-off-by: Alexander Kochetkov 
Cc: stable@vger.kernel.org # 4.1.x-
Signed-off-by: Heiko Stuebner 
Signed-off-by: Sasha Levin

clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188

2016-04-18T12:50:33+00:00

[ Upstream commit 3bba75a2ec32bd5fa7024a4de3b8cf9ee113a76a ]

Now that the rockchip clock subsystem does clock gating with GPIO banks,
these are no longer enabled once during probe and no longer stay enabled
for eternity. When all these clocks are disabled, the parent clock pclk_peri
might be disabled too, as no other child claims it. So, we need to add pclk_peri
to the critical clocks.

Signed-off-by: Romain Perier 
Tested-by: Michael Niewoehner 
Signed-off-by: Stephen Boyd 
Signed-off-by: Sasha Levin

clk: rockchip: add pclk_cpu to the list of rk3188 critical clocks

2016-04-18T12:50:32+00:00

[ Upstream commit 1166160ab531198f7abc773992c0e04d0f9b7600 ]

pclk_cpu needs to keep running because it is needed for devices like
the act8865 regulator but with the recent gpio clock handling this is
not always the case anymore. So add it to the list of critical clocks.

Signed-off-by: Michael Niewoehner 
Reviewed-by: Heiko Stuebner 
Signed-off-by: Stephen Boyd 
Signed-off-by: Sasha Levin

clk: versatile-icst: fix memory leak

2015-12-09T19:03:20+00:00

commit 7bdccef34fc67d3fce6778a018601dd41e43c5ce upstream.

A static code checker found a memory leak in the Versatile
ICST code. Fix it.

Fixes: a183da637c52 "clk: versatile: respect parent rate in ICST clock"
Reported-by: Stephen Boyd 
Signed-off-by: Linus Walleij 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: ti: fix dual-registration of uart4_ick

2015-10-22T21:43:26+00:00

commit 19e79687de22f23bcfb5e79cce3daba20af228d1 upstream.

On the OMAP AM3517 platform the uart4_ick gets registered
twice, causing any power management to /dev/ttyO3 to fail
when trying to wake the device up.

This solves the following oops:

[] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa09e008
[] PC is at serial_omap_pm+0x48/0x15c
[] LR is at _raw_spin_unlock_irqrestore+0x30/0x5c

Fixes: aafd900cab87 ("CLK: TI: add omap3 clock init file")
Cc: mturquette@baylibre.com
Cc: sboyd@codeaurora.org
Cc: linux-clk@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-kernel@lists.codethink.co.uk
Signed-off-by: Ben Dooks 
Signed-off-by: Tero Kristo 
Signed-off-by: Greg Kroah-Hartman

clk: qcom: Fix MSM8916 prng clock enable bit

2015-09-21T17:05:33+00:00

commit 1c4b4b0eb1909010b8ebda1ef208bf3ed62e7487 upstream.

Fix the enable bit of the pseudorandom number generator clock.

Reported-by: Stanimir Varbanov 
Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocks

2015-09-21T17:05:32+00:00

commit d7a304e9d018c99dda80f4c16ec0fe817b5be4a1 upstream.

The other ce clocks have the flag set, but ce1 doesn't, so
clk_set_rate() doesn't propagate up the tree to the ce1_src_clk.
Set the flag as this is supported.

Reported-by: Bjorn Andersson 
Tested-by: Bjorn Andersson 
Fixes: 02824653200b ("clk: qcom: Add APQ8084 Global Clock Controller support")
Fixes: d33faa9ead8d ("clk: qcom: Add support for MSM8974's global clock controller (GCC)")
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: pxa: fix core frequency reporting unit

2015-09-21T17:05:32+00:00

commit 4b5fb7dc9096d949a22651370bb6bf11f21edb30 upstream.

Legacy drivers which are not yet ported, such as cpufreq-pxa[23]xx, rely
on pxaXXx_get_clk_frequency_khz() to find the CPU core frequency.

This reporting was broken because the expected unit is kHz and not
Hz. Fix the reporting for pxa25x, pxa27x and pxa3xx.

Fixes: fe7710fae477 ("clk: add pxa25x clock drivers")
Fixes: d40670dc6169 ("clk: add pxa27x clock drivers")
Fixes: 9bbb8a338fb2 ("clk: pxa: add pxa3xx clock driver")
Signed-off-by: Robert Jarzmik 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: versatile: off by one in clk_sp810_timerclken_of_get()

2015-09-21T17:05:32+00:00

commit 3294bee87091be5f179474f6c39d1d87769635e2 upstream.

The ">" should be ">=" or we end up reading beyond the end of the array.

Fixes: 6e973d2c4385 ('clk: vexpress: Add separate SP810 driver')
Signed-off-by: Dan Carpenter 
Acked-by: Pawel Moll 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: pistachio: correct critical clock list

2015-09-21T17:05:31+00:00

commit d31ff5f7f3b142b8d1ebb3da89187c54cdf2bc71 upstream.

Current critical clock list for pistachio enables
only mips and sys clocks by default but there are
also other clocks that are not claimed by anyone and
needs to be enabled by default.

This patch updates the critical clocks that need
to be enabled by default.

Add a separate struct to distinguish the critical clocks
as listed:
1.) core clocks:
	a.) mips clock
2.) peripheral system clocks:
	a.) sys clock
	b.) sys_bus clock
	c.) DDR clock
	d.) ROM clock

Fixes: b35d7c33419c("CLK: Pistachio: Register core clocks")
Reviewed-by: Andrew Bresticker 
Signed-off-by: Ezequiel Garcia 
Signed-off-by: Damien.Horsley 
Signed-off-by: Govindraj Raja 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman