The default clock enabling functions for TI clocks -
omap2_dflt_clk_enable() and omap2_dflt_clk_disable() perform a
NULL check for the enable_reg field of the clk_hw_omap structure.
This enable_reg field however is merely a combination of the index
of the master IP module, and the offset from the master IP module's
base address. A value of 0 is perfectly valid, and the current error
checking will fail in these cases. The issue was found when trying
to enable the iva2_ck clock on OMAP3 platforms.

So, switch the check to use IS_ERR. This correction is similar to the
logic used in commit c807dbedb5e5 ("clk: ti: fix ti_clk_get_reg_addr
error handling").

Fixes: 9f37e90efaf0 ("clk: ti: dflt: move support for default gate clock..")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>

On the OMAP AM3517 platform the uart4_ick gets registered
twice, causing any power management to /dev/ttyO3 to fail
when trying to wake the device up.

This solves the following oops:

[] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa09e008
[] PC is at serial_omap_pm+0x48/0x15c
[] LR is at _raw_spin_unlock_irqrestore+0x30/0x5c

Fixes: aafd900cab87 ("CLK: TI: add omap3 clock init file")
Cc: stable@vger.kernel.org
Cc: mturquette@baylibre.com
Cc: sboyd@codeaurora.org
Cc: linux-clk@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-kernel@lists.codethink.co.uk
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Tero Kristo <t-kristo@ti.com>

The ABE related clocks should be configured via DT and not have it wired
inside of the kernel.

Fixes: a74c52def9ab ("clk: ti: clk-7xx: Correct ABE DPLL configuration")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>

Pull ARM DT updates from Olof Johansson:
 "Ladies and gentlemen, we proudly announce to you the latest branch of
  ARM device tree contents for the mainline kernel.  Come and see, come
  and see!

  No less than twentythree thousand lines of additions! Just imagine the
  joy you will have of using your mainline kernel on newly supported
  hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or
  UniPhier hardware!

  For those of you feeling less adventurous, added hardware support on
  platforms such as TI DM814x and Gumstix Overo platforms might be more
  of your liking.

  We've got something for everyone here!

  Ahem.  Cough.  So, anyway...

  This is the usual large batch of DT updates.  Lots and lots of smaller
  changes, some of the larger ones to point out are:

   - Rockchip veyron (Chromebook) support, as well as several other new boards
   - DRM support on Atmel AT91SAM9N12EK
   - USB additions on some Allwinner platforms
   - Mediatek MT6580 support
   - Freescale i.MX6UL support
   - cleanups for Renesas shmobile platforms
   - lots of added devices on LPC18xx
   - lots of added devices and boards on UniPhier

  There's also some dependent code added here, in particular some
  branches that are primarily merged through the clock tree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits)
  ARM: tegra: Add gpio-ranges property
  ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114
  ARM: tegra: Add Tegra124 PMU support
  ARM: tegra: jetson-tk1: Add GK20A GPU DT node
  ARM: tegra: venice2: Add GK20A GPU DT node
  ARM: tegra: Add IOMMU node to GK20A
  ARM: tegra: Add CPU regulator to the Jetson TK1 device tree
  ARM: tegra: Add entries for cpufreq on Tegra124
  ARM: tegra: Enable the DFLL on the Jetson TK1
  ARM: tegra: Add the DFLL to Tegra124 device tree
  ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.
  ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes
  ARM: dts: rockchip: correct regulator power states for suspend
  ARM: dts: rockchip: correct regulator PM properties
  ARM: dts: vexpress: Use assigned-clock-parents for sp810
  pinctrl: tegra: Only set the gpio range if needed
  arm: boot: dts: am4372: add ARM timers and SCU nodes
  ARM: dts: AM4372: Add the am4372-rtc compatible string
  ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
  ...

Pull ARM SoC platform updates from Olof Johansson:
 "New or improved SoC support:

   - add support for Atmel's SAMA5D2 SoC
   - add support for Freescale i.MX6UL
   - improved support for TI's DM814x platform
   - misc fixes and improvements for RockChip platforms
   - Marvell MVEBU suspend/resume support

  A few driver changes that ideally would belong in the drivers branch
  are also here (acked by appropriate maintainers):

   - power key input driver for Freescale platforms (svns)
   - RTC driver updates for Freescale platforms (svns/mxc)
   - clk fixes for TI DM814/816X

  + a bunch of other changes for various platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: rockchip: pm: Fix PTR_ERR() argument
  ARM: imx: mach-imx6ul: Fix allmodconfig build
  clk: ti: fix for definition movement
  ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
  memory: kill off set_irq_flags usage
  rtc: snvs: select option REGMAP_MMIO
  ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
  ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
  soc: mediatek: Fix SCPSYS compilation
  ARM: at91/soc: add basic support for new sama5d2 SoC
  ...

Use the provider based method to get a clock's name so that we
can get rid of the clk member in struct clk_hw one day. Mostly
converted with the following coccinelle script.

@@
struct clk_hw *E;
@@

-__clk_get_name(E->clk)
+clk_hw_get_name(E)

Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Kevin Cernekee <cernekee@chromium.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

This code is never called with a basic clock type, so the check
here is not doing anything useful and is blocking the removal of
__clk_get_flags(). Remove the check so we can delete the
__clk_get_flags() API.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Mostly converted with the following snippet:

@@
struct clk_hw *E;
@@

-__clk_get_flags(E->clk)
+clk_hw_get_flags(E)

Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Mostly converted with the following semantic patch:

@@
struct clk_hw *E;
@@

-__clk_get_num_parents(E->clk)
+clk_hw_get_num_parents(E)

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Chao Xie <chao.xie@marvell.com>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: "Emilio López" <emilio@elopez.com.ar>
Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>