linux-stable.git/drivers/clk/shmobile, branch linux-4.3.y

Merge branch 'i2c/for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

2015-09-08T23:16:26+00:00

Pull i2c updates from Wolfram Sang:
 "Features:

   - new drivers: Renesas EMEV2, register based MUX, NXP LPC2xxx
   - core: scans DT and assigns wakeup interrupts.  no driver changes needed.
   - core: some refcouting issues fixed and better API for that
   - core: new helper function for best effort block read emulation
   - slave framework: proper DT bindings and userspace instantiation
   - some bigger work for xiic, pxa, omap drivers

  .. and quite a number of smaller driver fixes, cleanups, improvements"

* 'i2c/for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (65 commits)
  i2c: mux: reg Change ioread endianness for readback
  i2c: mux: reg: fix compilation warnings
  i2c: mux: reg: simplify register size checking
  i2c: muxes: fix leaked i2c adapter device node references
  i2c: allow specifying separate wakeup interrupt in device tree
  of/irq: export of_get_irq_byname()
  i2c: xgene-slimpro: dma_mapping_error() doesn't return an error code
  i2c: Replace I2C_CROS_EC_TUNNEL dependency
  eeprom: at24: use i2c_smbus_read_i2c_block_data_or_emulated
  i2c: core: Add support for best effort block read emulation
  i2c: lpc2k: add driver
  i2c: mux: Add register-based mux i2c-mux-reg
  i2c: dt: describe generic bindings
  i2c: slave: print warning if slave flag not set
  i2c: support 10 bit and slave addresses in sysfs 'new_device'
  i2c: take address space into account when checking for used addresses
  i2c: apply DT flags when probing
  i2c: make address check indpendent from client struct
  i2c: rename address check functions
  i2c: apply address offset for slaves, too
  ...

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2015-09-01T20:00:04+00:00

Pull ARM SoC driver updates from Olof Johansson:
 "Some releases this branch is nearly empty, others we have more stuff.
  It tends to gather drivers that need SoC modification or dependencies
  such that they have to (also) go in through our tree.

  For this release, we have merged in part of the reset controller tree
  (with handshake that the parts we have merged in will remain stable),
  as well as dependencies on a few clock branches.

  In general, new items here are:

   - Qualcomm driver for SMM/SMD, which is how they communicate with the
     coprocessors on (some) of their platforms

   - memory controller work for ARM's PL172 memory controller

   - reset drivers for various platforms

   - PMU power domain support for Marvell platforms

   - Tegra support for T132/T210 SoCs: PMC, fuse, memory controller
     per-SoC support"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
  ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
  ARM: tegra: Disable cpuidle if PSCI is available
  soc/tegra: pmc: Use existing pclk reference
  soc/tegra: pmc: Remove unnecessary return statement
  soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
  memory: tegra: Add Tegra210 support
  memory: tegra: Add support for a variable-size client ID bitfield
  clk: shmobile: rz: Add CPG/MSTP Clock Domain support
  clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
  clk: shmobile: Add CPG/MSTP Clock Domain support
  ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets
  reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
  docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
  MIPS: ath79: Add the reset controller to the AR9132 dtsi
  reset: Add a driver for the reset controller on the AR71XX/AR9XXX
  devicetree: Add bindings for the ATH79 reset controller
  reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property
  doc: dt: add documentation for lpc1850-rgu reset driver
  ...

clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)

2015-08-24T23:49:12+00:00

Use the provider based method to get a clock's name so that we
can get rid of the clk member in struct clk_hw one day. Mostly
converted with the following coccinelle script.

@@
struct clk_hw *E;
@@

-__clk_get_name(E->clk)
+clk_hw_get_name(E)

Acked-by: Heiko Stuebner 
Cc: Sylwester Nawrocki 
Cc: Tomasz Figa 
Cc: Peter De Schrijver 
Cc: Prashant Gaikwad 
Cc: Stephen Warren 
Acked-by: Thierry Reding 
Cc: Thierry Reding 
Cc: Alexandre Courbot 
Cc: Tero Kristo 
Cc: Ulf Hansson 
Acked-by: Sebastian Hesselbarth 
Acked-by: Andrew Bresticker 
Cc: Ezequiel Garcia 
Cc: Ralf Baechle 
Cc: Kevin Cernekee 
Acked-by: Geert Uytterhoeven 
Cc: Ulrich Hecht 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Stephen Boyd

clk: Replace __clk_get_num_parents with clk_hw_get_num_parents()

2015-08-24T23:48:43+00:00

Mostly converted with the following semantic patch:

@@
struct clk_hw *E;
@@

-__clk_get_num_parents(E->clk)
+clk_hw_get_num_parents(E)

Acked-by: Boris Brezillon 
Cc: Chao Xie 
Cc: Krzysztof Kozlowski 
Cc: Javier Martinez Canillas 
Cc: Tomasz Figa 
Cc: Maxime Ripard 
Cc: "Emilio López" 
Acked-by: Tero Kristo 
Cc: Geert Uytterhoeven 
Acked-by: Sylwester Nawrocki 
Signed-off-by: Stephen Boyd

clk: shmobile: rz: Add CPG/MSTP Clock Domain support

2015-08-12T01:31:28+00:00

Add Clock Domain support to the RZ Clock Pulse Generator (CPG) driver
using the generic PM Domain.  This allows to power-manage the module
clocks of SoC devices that are part of the CPG/MSTP Clock Domain using
Runtime PM, or for system suspend/resume.

SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a proper
"power-domains" property.

Signed-off-by: Geert Uytterhoeven 
Acked-by: Stephen Boyd 
Reviewed-by: Ulf Hansson 
Signed-off-by: Simon Horman

clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support

2015-08-12T01:31:28+00:00

Add Clock Domain support to the R-Car Gen2 Clock Pulse Generator (CPG)
driver using the generic PM Domain.  This allows to power-manage the
module clocks of SoC devices that are part of the CPG/MSTP Clock Domain
using Runtime PM, or for system suspend/resume.

SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a proper
"power-domains" property.

Signed-off-by: Geert Uytterhoeven 
Acked-by: Stephen Boyd 
Reviewed-by: Ulf Hansson 
Signed-off-by: Simon Horman

clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support

2015-08-12T01:31:27+00:00

Add Clock Domain support to the R-Car H1 Clock Pulse Generator (CPG)
driver using the generic PM Domain.  This allows to power-manage the
module clocks of SoC devices that are part of the CPG/MSTP Clock Domain
using Runtime PM, or for system suspend/resume.

SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a proper
"power-domains" property.

Also update the reg property in the DT binding doc example to match the
actual dtsi, which uses #address-cells and #size-cells == 1, not 2.

Signed-off-by: Geert Uytterhoeven 
Acked-by: Stephen Boyd 
Reviewed-by: Ulf Hansson 
Signed-off-by: Simon Horman

clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support

2015-08-12T01:31:27+00:00

Add Clock Domain support to the R-Car M1A Clock Pulse Generator (CPG)
driver using the generic PM Domain.  This allows to power-manage the
module clocks of SoC devices that are part of the CPG/MSTP Clock Domain
using Runtime PM, or for system suspend/resume.

SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a proper
"power-domains" property.

Signed-off-by: Geert Uytterhoeven 
Acked-by: Stephen Boyd 
Reviewed-by: Ulf Hansson 
Signed-off-by: Simon Horman

clk: shmobile: Add CPG/MSTP Clock Domain support

2015-08-12T01:31:26+00:00

Add Clock Domain support to the Clock Pulse Generator (CPG) Module Stop
(MSTP) Clocks driver using the generic PM Domain.  This allows to
power-manage the module clocks of SoC devices that are part of the
CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume.

SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a
proper "power-domains" property.

The CPG/MSTP Clock Domain code will scan such devices for clocks that
are suitable for power-managing the device, by looking for a clock that
is compatible with "renesas,cpg-mstp-clocks".

Signed-off-by: Geert Uytterhoeven 
Acked-by: Laurent Pinchart 
Acked-by: Stephen Boyd 
Reviewed-by: Ulf Hansson 
Reviewed-by: Kevin Hilman 
Signed-off-by: Simon Horman

clk: shmobile: emev2: deassert reset for IIC0/1

2015-08-10T06:37:29+00:00

We have a driver now for IIC, so disable reset for them.

Signed-off-by: Wolfram Sang 
Acked-by: Stephen Boyd 
Signed-off-by: Wolfram Sang