linux-stable.git/drivers/clk/qcom, branch v3.14

clk: qcom: Fix modular build

2014-01-17T21:39:42+00:00

According to Documentation/kbuild/makefiles.txt these symbols
should be clk-qcom-y. Otherwise the build will fail if
CONFIG_COMMON_CLK_QCOM=m. Fix it.

Reported-by: kbuild test robot 
Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add support for MSM8660's global clock controller (GCC)

2014-01-16T20:01:05+00:00

Add a driver for the global clock controller found on MSM8660
based platforms. This should allow most non-multimedia device
drivers to probe and control their clocks.

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)

2014-01-16T20:01:05+00:00

Add a driver for the global clock controller found on MSM 8974
based platforms. This should allow most multimedia device drivers
to probe and control their clocks.

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add support for MSM8974's global clock controller (GCC)

2014-01-16T20:01:04+00:00

Add a driver for the global clock controller found on MSM 8974
based platforms. This should allow most non-multimedia device
drivers to probe and control their clocks.

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)

2014-01-16T20:01:03+00:00

Add a driver for the multimedia clock controller found on MSM
8960 based platforms. This should allow multimedia device drivers
to probe and control their clocks.

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add support for MSM8960's global clock controller (GCC)

2014-01-16T20:01:02+00:00

Add a driver for the global clock controller found on MSM8960
based platforms. This should allow most non-multimedia device
drivers to probe and control their clocks.

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add reset controller support

2014-01-16T20:01:02+00:00

Reset controllers and clock controllers are combined into one IP
block on Qualcomm chipsets. Usually a reset signal is associated
with each clock branch but sometimes a reset signal is associated
with a handful of clocks. Either way the register interface is
the same; set a bit to assert a reset and clear a bit to deassert
a reset. Add support for these types of resets signals.

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add support for branches/gate clocks

2014-01-16T20:01:01+00:00

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add support for root clock generators (RCGs)

2014-01-16T20:01:00+00:00

Add support for the root clock generators on Qualcomm devices.
RCGs are highly customizable mux/divider/counter clocks that can
be used to generate almost any rate desired given some input
source that is faster than the desired rate.

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette

clk: qcom: Add support for phase locked loops (PLLs)

2014-01-16T20:00:59+00:00

Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.

Signed-off-by: Stephen Boyd 
Signed-off-by: Mike Turquette