linux-stable.git/drivers/clk/qcom, branch linux-4.1.y

clk: qcom: msm8916: Fix crypto clock flags

2016-07-11T03:07:26+00:00

[ Upstream commit 2a0974aa1a0b40a92387ea03dbfeacfbc9ba182c ]

This patch adds the CLK_SET_RATE_PARENT flag for the crypto core and
ahb blocks.  Without this flag, clk_set_rate can fail for certain
frequency requests.

Signed-off-by: Andy Gross 
Fixes: 3966fab8b6ab ("clk: qcom: Add MSM8916 Global Clock Controller support")
Signed-off-by: Stephen Boyd 
Signed-off-by: Sasha Levin

clk: qcom: msm8960: Fix ce3_src register offset

2016-07-11T03:07:18+00:00

[ Upstream commit 0f75e1a370fd843c9e508fc1ccf0662833034827 ]

The offset seems to have been copied from the sata clk. Fix it so
that enabling the crypto engine source clk works.

Tested-by: Srinivas Kandagatla 
Tested-by: Bjorn Andersson 
Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: Stephen Boyd 
Signed-off-by: Sasha Levin

clk: qcom: msm8960: fix ce3_core clk enable register

2016-07-11T03:07:17+00:00

[ Upstream commit 732d6913691848db9fabaa6a25b4d6fad10ddccf ]

This patch corrects the enable register offset which is actually 0x36cc
instead of 0x36c4

Signed-off-by: Srinivas Kandagatla 
Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: Stephen Boyd 
Signed-off-by: Sasha Levin

clk: qcom: Fix MSM8916 prng clock enable bit

2015-09-21T17:05:33+00:00

commit 1c4b4b0eb1909010b8ebda1ef208bf3ed62e7487 upstream.

Fix the enable bit of the pseudorandom number generator clock.

Reported-by: Stanimir Varbanov 
Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocks

2015-09-21T17:05:32+00:00

commit d7a304e9d018c99dda80f4c16ec0fe817b5be4a1 upstream.

The other ce clocks have the flag set, but ce1 doesn't, so
clk_set_rate() doesn't propagate up the tree to the ce1_src_clk.
Set the flag as this is supported.

Reported-by: Bjorn Andersson 
Tested-by: Bjorn Andersson 
Fixes: 02824653200b ("clk: qcom: Add APQ8084 Global Clock Controller support")
Fixes: d33faa9ead8d ("clk: qcom: Add support for MSM8974's global clock controller (GCC)")
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: qcom: Use parent rate when set rate to pixel RCG clock

2015-08-03T16:29:17+00:00

commit 6d451367bfa16fc103604bacd258f534c65d1540 upstream.

Since the parent rate has been recalculated, pixel RCG clock
should rely on it to find the correct M/N values during set_rate,
instead of calling __clk_round_rate() to its parent again.

Signed-off-by: Hai Li 
Tested-by: Archit Taneja 
Fixes: 99cbd064b059 ("clk: qcom: Support display RCG clocks")
[sboyd@codeaurora.org: Silenced unused parent variable warning]
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: qcom: Fix MSM8916 gfx3d_clk_src configuration

2015-05-01T01:42:55+00:00

The gfx3d_clk_src parents configuration is incorrect. Fix it.

Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov 
Signed-off-by: Stephen Boyd

clk: qcom: Fix MSM8916 venus divider value

2015-05-01T01:42:48+00:00

One of the video codec clock frequencies has incorrect divider
value. Fix it.

Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov 
Signed-off-by: Stephen Boyd

clk: qcom: Fix parent_map translations

2015-04-08T18:07:38+00:00

When we introduced the parent_map tables, we missed to update
some of the functions where mapping is translated. Fix this.

Signed-off-by: Georgi Djakov 
Tested-by: Nicolas Dechesne 
Signed-off-by: Stephen Boyd

clk: qcom: fix driver dependencies

2015-04-07T23:14:54+00:00

Support for Qualcomm's clock controllers should be available only
on Qualcomm platforms.

Signed-off-by: Bartlomiej Zolnierkiewicz 
Acked-by: Kyungmin Park 
Cc: Mike Turquette 
Signed-off-by: Stephen Boyd