linux-stable.git/drivers/clk/mediatek, branch linux-4.2.y

clk: mediatek: mt8173: Fix enabling of critical clocks

2015-07-06T22:54:13+00:00

On the MT8173 the clocks are provided by different units. To enable
the critical clocks we must be sure that all parent clocks are already
registered, otherwise the parents of the critical clocks end up being
unused and get disabled later. To find a place where all parents are
registered we try each time after we've registered some clocks if
all known providers are present now and only then we enable the critical
clocks

Signed-off-by: Sascha Hauer 
Signed-off-by: James Liao 
[sboyd@codeaurora.org: Marked function and data __init]
Signed-off-by: Stephen Boyd

clk: mediatek: Fix apmixedsys clock registration

2015-06-04T21:07:07+00:00

The size of clk_data should be the same as CLK_APMIXED_NR_CLK
instead of ARRAY_SIZE(plls). CLK_APMIXED_* is numbered from 1, so
CLK_APMIXED_NR_CLK will be greater than ARRAY_SIZE(plls).

Signed-off-by: James Liao 
Acked-by: Sascha Hauer 
Signed-off-by: Stephen Boyd

clk: mediatek: Initialize clk_init_data

2015-05-20T01:40:48+00:00

The variable init (struct clk_init_data) is allocated on the stack.
We weren't initializing the .flags field, so it contains random junk,
which can cause all kinds of interesting issues when the flags are
parsed by clk_register.

Signed-off-by: Ricky Liang 
Acked-by: Sascha Hauer 
Signed-off-by: Stephen Boyd

clk: mediatek: Add basic clocks for Mediatek MT8173.

2015-05-06T05:50:38+00:00

This patch adds basic clocks for MT8173, including TOPCKGEN, PLLs,
INFRA and PERI clocks.

Signed-off-by: James Liao 
Signed-off-by: Henry Chen 
Signed-off-by: Sascha Hauer 
Signed-off-by: Stephen Boyd

clk: mediatek: Add basic clocks for Mediatek MT8135.

2015-05-06T05:50:35+00:00

This patch adds basic clocks for MT8135, including TOPCKGEN, PLLs,
INFRA and PERI clocks.

Signed-off-by: James Liao 
Signed-off-by: Henry Chen 
Signed-off-by: Sascha Hauer 
Signed-off-by: Stephen Boyd

clk: mediatek: Add reset controller support

2015-05-06T05:50:33+00:00

The pericfg and infracfg units also provide reset lines to several
other SoC internal units. This adds a function which can be called
from the pericfg and infracfg initialization functions which will
register the reset controller using reset_controller_register. The
reset controller will provide support for resetting the units
connected to the pericfg and infracfg controller. The units resetted
by this controller can use the standard reset device tree binding
to gain access to the reset lines.

Signed-off-by: Sascha Hauer 
Acked-by: Philipp Zabel 
Signed-off-by: Stephen Boyd

clk: mediatek: Add initial common clock support for Mediatek SoCs.

2015-05-06T05:50:31+00:00

This patch adds common clock support for Mediatek SoCs, including plls,
muxes and clock gates.

Signed-off-by: James Liao 
Signed-off-by: Henry Chen 
Signed-off-by: Sascha Hauer 
[sboyd@codeaurora.org: Squelch checkpatch warning in clk-mtk.h]
Signed-off-by: Stephen Boyd