<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/accel, branch v6.6.9</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>accel/ivpu/37xx: Fix interrupt_clear_with_0 WA initialization</title>
<updated>2023-12-20T16:01:54+00:00</updated>
<author>
<name>Andrzej Kacprowski</name>
<email>Andrzej.Kacprowski@intel.com</email>
</author>
<published>2023-12-04T12:23:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=83a42d791ba206978ec5381743dbcc49f3357e1d'/>
<id>83a42d791ba206978ec5381743dbcc49f3357e1d</id>
<content type='text'>
[ Upstream commit 35c49cfc8b702eda7a0d3f05497b16f81b69e289 ]

Using PCI Device ID/Revision to initialize the interrupt_clear_with_0
workaround is problematic - there are many pre-production
steppings with different behavior, even with the same PCI ID/Revision

Instead of checking for PCI Device ID/Revision, check the VPU
buttress interrupt status register behavior - if this register
is not zero after writing 1s it means there register is RW
instead of RW1C and we need to enable the interrupt_clear_with_0
workaround.

Fixes: 7f34e01f77f8 ("accel/ivpu: Clear specific interrupt status bits on C0")
Signed-off-by: Andrzej Kacprowski &lt;Andrzej.Kacprowski@intel.com&gt;
Signed-off-by: Jacek Lawrynowicz &lt;jacek.lawrynowicz@linux.intel.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Link: https://lore.kernel.org/all/20231204122331.40560-1-jacek.lawrynowicz@linux.intel.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 35c49cfc8b702eda7a0d3f05497b16f81b69e289 ]

Using PCI Device ID/Revision to initialize the interrupt_clear_with_0
workaround is problematic - there are many pre-production
steppings with different behavior, even with the same PCI ID/Revision

Instead of checking for PCI Device ID/Revision, check the VPU
buttress interrupt status register behavior - if this register
is not zero after writing 1s it means there register is RW
instead of RW1C and we need to enable the interrupt_clear_with_0
workaround.

Fixes: 7f34e01f77f8 ("accel/ivpu: Clear specific interrupt status bits on C0")
Signed-off-by: Andrzej Kacprowski &lt;Andrzej.Kacprowski@intel.com&gt;
Signed-off-by: Jacek Lawrynowicz &lt;jacek.lawrynowicz@linux.intel.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Link: https://lore.kernel.org/all/20231204122331.40560-1-jacek.lawrynowicz@linux.intel.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/ivpu: Print information about used workarounds</title>
<updated>2023-12-20T16:01:54+00:00</updated>
<author>
<name>Stanislaw Gruszka</name>
<email>stanislaw.gruszka@linux.intel.com</email>
</author>
<published>2023-09-01T09:49:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=0afcc6291024dc8fa32b966a0da27345b82bc6cd'/>
<id>0afcc6291024dc8fa32b966a0da27345b82bc6cd</id>
<content type='text'>
[ Upstream commit eefa13a69053a09f20b2d1c00dda59be9c98cfe9 ]

Use ivpu_dbg(MISC) to print information about workarounds.

Reviewed-by: Karol Wachowski &lt;karol.wachowski@linux.intel.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20230901094957.168898-6-stanislaw.gruszka@linux.intel.com
Stable-dep-of: 35c49cfc8b70 ("accel/ivpu/37xx: Fix interrupt_clear_with_0 WA initialization")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit eefa13a69053a09f20b2d1c00dda59be9c98cfe9 ]

Use ivpu_dbg(MISC) to print information about workarounds.

Reviewed-by: Karol Wachowski &lt;karol.wachowski@linux.intel.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20230901094957.168898-6-stanislaw.gruszka@linux.intel.com
Stable-dep-of: 35c49cfc8b70 ("accel/ivpu/37xx: Fix interrupt_clear_with_0 WA initialization")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/ivpu/37xx: Fix hangs related to MMIO reset</title>
<updated>2023-12-03T06:33:04+00:00</updated>
<author>
<name>Jacek Lawrynowicz</name>
<email>jacek.lawrynowicz@linux.intel.com</email>
</author>
<published>2023-11-15T11:10:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=790c480d35dc98b9a877240654d43379fbf5c30d'/>
<id>790c480d35dc98b9a877240654d43379fbf5c30d</id>
<content type='text'>
[ Upstream commit 3f7c0634926daf48cd2f6db6c1197a1047074088 ]

There is no need to call MMIO reset using VPU_37XX_BUTTRESS_VPU_IP_RESET
register. IP will be reset by FLR or by entering d0i3. Also IP reset
during power_up is not needed as the VPU is already in reset.

Removing MMIO reset improves stability as it a partial device reset
that is not safe in some corner cases.

This change also brings back ivpu_boot_pwr_domain_disable() that
helps to properly power down VPU when it is hung by a buggy workload.

Signed-off-by: Jacek Lawrynowicz &lt;jacek.lawrynowicz@linux.intel.com&gt;
Fixes: 828d63042aec ("accel/ivpu: Don't enter d0i3 during FLR")
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231115111004.1304092-1-jacek.lawrynowicz@linux.intel.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 3f7c0634926daf48cd2f6db6c1197a1047074088 ]

There is no need to call MMIO reset using VPU_37XX_BUTTRESS_VPU_IP_RESET
register. IP will be reset by FLR or by entering d0i3. Also IP reset
during power_up is not needed as the VPU is already in reset.

Removing MMIO reset improves stability as it a partial device reset
that is not safe in some corner cases.

This change also brings back ivpu_boot_pwr_domain_disable() that
helps to properly power down VPU when it is hung by a buggy workload.

Signed-off-by: Jacek Lawrynowicz &lt;jacek.lawrynowicz@linux.intel.com&gt;
Fixes: 828d63042aec ("accel/ivpu: Don't enter d0i3 during FLR")
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231115111004.1304092-1-jacek.lawrynowicz@linux.intel.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/ivpu: Do not initialize parameters on power up</title>
<updated>2023-12-03T06:33:04+00:00</updated>
<author>
<name>Stanislaw Gruszka</name>
<email>stanislaw.gruszka@linux.intel.com</email>
</author>
<published>2023-10-20T10:45:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e9fd34ab6ea2c2ab5b6eb326e507ff34dcf33d60'/>
<id>e9fd34ab6ea2c2ab5b6eb326e507ff34dcf33d60</id>
<content type='text'>
[ Upstream commit f956bf2080862cfc97412e1eaa08689bc9838d20 ]

Initialize HW specific parameters only once. We do not have to do this
on every power_up (performed during initialization and on resume). Move
corresponding code to -&gt;info_init()

Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231020104501.697763-6-stanislaw.gruszka@linux.intel.com
Stable-dep-of: 3f7c0634926d ("accel/ivpu/37xx: Fix hangs related to MMIO reset")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit f956bf2080862cfc97412e1eaa08689bc9838d20 ]

Initialize HW specific parameters only once. We do not have to do this
on every power_up (performed during initialization and on resume). Move
corresponding code to -&gt;info_init()

Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231020104501.697763-6-stanislaw.gruszka@linux.intel.com
Stable-dep-of: 3f7c0634926d ("accel/ivpu/37xx: Fix hangs related to MMIO reset")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/habanalabs/gaudi2: Fix incorrect string length computation in gaudi2_psoc_razwi_get_engines()</title>
<updated>2023-11-20T10:59:11+00:00</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2023-09-04T19:18:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a5d2bb064cffbae71f7e0e5903b0970d33830b48'/>
<id>a5d2bb064cffbae71f7e0e5903b0970d33830b48</id>
<content type='text'>
[ Upstream commit 90f3de616259cbb5666f00f8daf5420cd7d71d18 ]

snprintf() returns the "number of characters which *would* be generated for
the given input", not the size *really* generated.

In order to avoid too large values for 'str_size' (and potential negative
values for "PSOC_RAZWI_ENG_STR_SIZE - str_size") use scnprintf()
instead of snprintf().

Fixes: c0e6df916050 ("accel/habanalabs: fix address decode RAZWI handling")
Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 90f3de616259cbb5666f00f8daf5420cd7d71d18 ]

snprintf() returns the "number of characters which *would* be generated for
the given input", not the size *really* generated.

In order to avoid too large values for 'str_size' (and potential negative
values for "PSOC_RAZWI_ENG_STR_SIZE - str_size") use scnprintf()
instead of snprintf().

Fixes: c0e6df916050 ("accel/habanalabs: fix address decode RAZWI handling")
Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/ivpu/37xx: Fix missing VPUIP interrupts</title>
<updated>2023-10-26T05:43:28+00:00</updated>
<author>
<name>Karol Wachowski</name>
<email>karol.wachowski@linux.intel.com</email>
</author>
<published>2023-10-24T16:19:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b132ac51d7a50c37683be56c96ff64f8c887930f'/>
<id>b132ac51d7a50c37683be56c96ff64f8c887930f</id>
<content type='text'>
Move sequence of masking and unmasking global interrupts from buttress
interrupt handler to generic one that handles both VPUIP and BTRS
interrupts. Unmasking global interrupts will re-trigger MSI for any
pending interrupts.

Lack of this sequence will cause the driver to miss any
VPUIP interrupt that comes after reading VPU_37XX_HOST_SS_ICB_STATUS_0
and before clearing all active interrupt sources.

Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver for Intel VPU")
Cc: stable@vger.kernel.org
Signed-off-by: Karol Wachowski &lt;karol.wachowski@linux.intel.com&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231024161952.759914-1-stanislaw.gruszka@linux.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move sequence of masking and unmasking global interrupts from buttress
interrupt handler to generic one that handles both VPUIP and BTRS
interrupts. Unmasking global interrupts will re-trigger MSI for any
pending interrupts.

Lack of this sequence will cause the driver to miss any
VPUIP interrupt that comes after reading VPU_37XX_HOST_SS_ICB_STATUS_0
and before clearing all active interrupt sources.

Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver for Intel VPU")
Cc: stable@vger.kernel.org
Signed-off-by: Karol Wachowski &lt;karol.wachowski@linux.intel.com&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231024161952.759914-1-stanislaw.gruszka@linux.intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/ivpu: Extend address range for MMU mmap</title>
<updated>2023-10-19T06:01:20+00:00</updated>
<author>
<name>Wludzik, Jozef</name>
<email>jozef.wludzik@intel.com</email>
</author>
<published>2023-10-18T11:01:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8f5ad367e8b884772945c6c9fb622ac94b7d3e32'/>
<id>8f5ad367e8b884772945c6c9fb622ac94b7d3e32</id>
<content type='text'>
Allow to use whole address range in MMU context mmap which is up to 48
bits. Return invalid argument from MMU context mmap in case address is
not aligned to MMU page size, address is below MMU page size or address
is greater then 47 bits.

This fixes problem disallowing to run large models on VPU4

Signed-off-by: Wludzik, Jozef &lt;jozef.wludzik@intel.com&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231018110113.547208-1-stanislaw.gruszka@linux.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Allow to use whole address range in MMU context mmap which is up to 48
bits. Return invalid argument from MMU context mmap in case address is
not aligned to MMU page size, address is below MMU page size or address
is greater then 47 bits.

This fixes problem disallowing to run large models on VPU4

Signed-off-by: Wludzik, Jozef &lt;jozef.wludzik@intel.com&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231018110113.547208-1-stanislaw.gruszka@linux.intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "accel/ivpu: Use cached buffers for FW loading"</title>
<updated>2023-10-19T04:51:51+00:00</updated>
<author>
<name>Stanislaw Gruszka</name>
<email>stanislaw.gruszka@linux.intel.com</email>
</author>
<published>2023-10-17T12:13:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=610b5d219d1ccac8064556310cc0e62e3c202389'/>
<id>610b5d219d1ccac8064556310cc0e62e3c202389</id>
<content type='text'>
This reverts commit 645d694559cab36fe6a57c717efcfa27d9321396.

The commit cause issues with memory access from the device side.
Switch back to write-combined memory mappings until the issues
will be properly addressed.

Add extra wmb() needed when boot_params-&gt;save_restore_ret_address() is
modified.

Reviewed-by: Karol Wachowski &lt;karol.wachowski@linux.intel.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231017121353.532466-1-stanislaw.gruszka@linux.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit 645d694559cab36fe6a57c717efcfa27d9321396.

The commit cause issues with memory access from the device side.
Switch back to write-combined memory mappings until the issues
will be properly addressed.

Add extra wmb() needed when boot_params-&gt;save_restore_ret_address() is
modified.

Reviewed-by: Karol Wachowski &lt;karol.wachowski@linux.intel.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231017121353.532466-1-stanislaw.gruszka@linux.intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/ivpu: Don't enter d0i3 during FLR</title>
<updated>2023-10-19T04:48:05+00:00</updated>
<author>
<name>Jacek Lawrynowicz</name>
<email>jacek.lawrynowicz@linux.intel.com</email>
</author>
<published>2023-10-03T06:42:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=828d63042aeca132a93938b98dc7f1a6c97bbc51'/>
<id>828d63042aeca132a93938b98dc7f1a6c97bbc51</id>
<content type='text'>
Avoid HW bug on some platforms where we enter D0i3 state
and CPU is in low power states (C8 or above).

Fixes: 852be13f3bd3 ("accel/ivpu: Add PM support")
Cc: stable@vger.kernel.org
Signed-off-by: Jacek Lawrynowicz &lt;jacek.lawrynowicz@linux.intel.com&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231003064213.1527327-1-stanislaw.gruszka@linux.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Avoid HW bug on some platforms where we enter D0i3 state
and CPU is in low power states (C8 or above).

Fixes: 852be13f3bd3 ("accel/ivpu: Add PM support")
Cc: stable@vger.kernel.org
Signed-off-by: Jacek Lawrynowicz &lt;jacek.lawrynowicz@linux.intel.com&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231003064213.1527327-1-stanislaw.gruszka@linux.intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>accel/ivpu: Use cached buffers for FW loading</title>
<updated>2023-09-27T05:40:43+00:00</updated>
<author>
<name>Karol Wachowski</name>
<email>karol.wachowski@linux.intel.com</email>
</author>
<published>2023-09-26T12:09:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=645d694559cab36fe6a57c717efcfa27d9321396'/>
<id>645d694559cab36fe6a57c717efcfa27d9321396</id>
<content type='text'>
Create buffers with cache coherency on the CPU side (write-back) while
disabling snooping on the VPU side. These buffers require an explicit
cache flush after each CPU-side modification.

Configuring pages as write-combined may introduce significant delays,
potentially taking hundreds of milliseconds for 64 MB buffers.

Added internal DRM_IVPU_BO_NOSNOOP mask which disables snooping on the
VPU side. Allocate FW runtime memory buffer (64 MB) as cached with
snooping-disabled.

This fixes random long FW loading times and boot params memory
corruption on warmboot (due to missed wmb).

Fixes: 02d5b0aacd05 ("accel/ivpu: Implement firmware parsing and booting")
Signed-off-by: Karol Wachowski &lt;karol.wachowski@linux.intel.com&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20230926120943.GD846747@linux.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Create buffers with cache coherency on the CPU side (write-back) while
disabling snooping on the VPU side. These buffers require an explicit
cache flush after each CPU-side modification.

Configuring pages as write-combined may introduce significant delays,
potentially taking hundreds of milliseconds for 64 MB buffers.

Added internal DRM_IVPU_BO_NOSNOOP mask which disables snooping on the
VPU side. Allocate FW runtime memory buffer (64 MB) as cached with
snooping-disabled.

This fixes random long FW loading times and boot params memory
corruption on warmboot (due to missed wmb).

Fixes: 02d5b0aacd05 ("accel/ivpu: Implement firmware parsing and booting")
Signed-off-by: Karol Wachowski &lt;karol.wachowski@linux.intel.com&gt;
Reviewed-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Signed-off-by: Stanislaw Gruszka &lt;stanislaw.gruszka@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20230926120943.GD846747@linux.intel.com
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