linux-stable.git/arch/xtensa/kernel/traps.c, branch linux-4.9.y

signal/xtensa: Consistenly use SIGBUS in do_unaligned_user

2018-07-03T09:23:06+00:00

commit 7de712ccc096b81d23cc0a941cd9b8cb3956605d upstream.

While working on changing this code to use force_sig_fault I
discovered that do_unaliged_user is sets si_signo to SIGBUS and passes
SIGSEGV to force_sig_info.  Which is just b0rked.

The code is reporting a SIGBUS error so replace the SIGSEGV with SIGBUS.

Cc: Chris Zankel 
Cc: Max Filippov 
Cc: linux-xtensa@linux-xtensa.org
Cc: stable@vger.kernel.org
Acked-by: Max Filippov 
Fixes: 5a0015d62668 ("[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 3")
Signed-off-by: "Eric W. Biederman" 
Signed-off-by: Greg Kroah-Hartman

xtensa: clean up printk usage for boot/crash logging

2016-11-07T07:31:46+00:00

Convert printk(KERN_* to pr_* and printk's without level to pr_cont.
This fixes torn register dumps, stack dumps, stack traces and timestamps
in the middle of 'Calibrating CPU frequency' message.
Also drop unused show_code and drop false comment about show_stack.

Signed-off-by: Max Filippov

xtensa: support hardware breakpoints/watchpoints

2016-03-11T08:53:32+00:00

Use perf framework to manage hardware instruction and data breakpoints.
Add two new ptrace calls: PTRACE_GETHBPREGS and PTRACE_SETHBPREGS to
query and set instruction and data breakpoints.
Address bit 0 choose instruction (0) or data (1) break register, bits
31..1 are the register number.
Both calls transfer two 32-bit words: address (0) and control (1).
Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
'trigger on load, bits 29..0 are length. Length 0 is used to clear a
breakpoint. To set a breakpoint length must be a power of 2 in the range
1..64 and the address must be length-aligned.

Introduce new thread_info flag: TIF_DB_DISABLED. Set it if debug
exception is raised by the kernel code accessing watched userspace
address and disable corresponding data breakpoint. On exit to userspace
check that flag and, if set, restore all data breakpoints.

Handle debug exceptions raised with PS.EXCM set. This may happen when
window overflow/underflow handler or fast exception handler hits data
breakpoint, in which case save and disable all data breakpoints,
single-step faulting instruction and restore data breakpoints.

Signed-off-by: Max Filippov

xtensa: use context structure for debug exceptions

2016-03-11T08:53:32+00:00

With implementation of data breakpoints debug exceptions raised when
PS.EXCM is set need to be handled, e.g. window overflow code can write
to watched userspace address. Currently debug exception handler uses
EXCSAVE and DEPC SRs to save temporary registers, but DEPC may not be
available when PS.EXCM is set and more space will be needed to save
additional state.
Reorganize debug context: create per-CPU structure debug_table instance
and store its address in the EXCSAVE instead of
debug_exception function address. Expand this structure when more save
space is needed.

Signed-off-by: Max Filippov

xtensa: remove remaining non-functional KGDB bits

2016-03-11T08:53:32+00:00

KGDB is not supported on xtensa, but there are bits of related code
under arch/xtensa/kernel. Remove these bits.

Signed-off-by: Max Filippov

xtensa: make fake NMI configurable

2016-01-11T14:31:55+00:00

Do not always use fake NMI when safe, provide Kconfig option instead.
Print a warning if fake NMI is chosen in unsafe configuration, but allow
it, because it may work if the user knows that interrupts with
priorities at or above PMM IRQ are not used. Add a check to NMI handler
that BUGs if any of these IRQs fire.

Signed-off-by: Max Filippov

xtensa: implement fake NMI

2015-08-17T04:33:39+00:00

In case perf IRQ is the highest of the medium-level IRQs, and is alone
on its level, it may be treated as NMI:
- LOCKLEVEL is defined to be one level less than EXCM level,
- IRQ masking never lowers current IRQ level,
- new fake exception cause code, EXCCAUSE_MAPPED_NMI is assigned to that
  IRQ; new second level exception handler, do_nmi, assigned to it
  handles it as NMI,
- atomic operations in configurations without s32c1i still need to mask
  all interrupts.

Cc: Peter Zijlstra 
Acked-by: Peter Zijlstra (Intel) 
Signed-off-by: Max Filippov

xtensa: reorganize irq flags tracing

2015-08-17T04:33:34+00:00

entry.s only disables IRQs on hardware IRQ, move trace_hardirqs_off call
into do_interrupt. Check actual intlevel that will be restored on return
from exception handler to decide if trace_hardirqs_on should be called.
Annotate IRQ on/off points in the TIF_* handling loop on return from
exception handler.

Signed-off-by: Max Filippov

xtensa: don't allow overflow/underflow on unaligned stack

2014-08-14T07:59:32+00:00

Double exceptions that happen during register window overflow/underflow
are handled in the topmost stack frame, as if it was the only exception
that occured. However unaligned access exception handler is special
because it needs to analyze instruction that caused the exception, but
the userspace instruction that triggered window exception is completely
irrelevant. Unaligned data access is rather normal in the generic
userspace code, but stack pointer manipulation must always be done by
architecture-aware code and thus unaligned stack means a serious problem
anyway.
Use the default unaligned access handler that raises SIGBUS in case
of unaligned access in window overflow/underflow handler.

Signed-off-by: Max Filippov

xtensa: implement CPU hotplug

2014-01-14T18:19:59+00:00

Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel