linux-stable.git/arch/xtensa/kernel/setup.c, branch v3.12

Merge tag 'xtensa-next-20130912' of git://github.com/czankel/xtensa-linux

2013-09-13T17:57:48+00:00

Pull Xtensa updates from Chris Zankel.

* tag 'xtensa-next-20130912' of git://github.com/czankel/xtensa-linux:
  xtensa: Fix broken allmodconfig build
  xtensa: remove CCOUNT_PER_JIFFY
  xtensa: fix !CONFIG_XTENSA_CALIBRATE_CCOUNT build failure
  xtensa: don't use echo -e needlessly
  xtensa: new fast_alloca handler
  xtensa: keep a3 and excsave1 on entry to exception handlers
  xtensa: enable kernel preemption
  xtensa: check thread flags atomically on return from user exception

xtensa: remove CCOUNT_PER_JIFFY

2013-09-06T16:48:59+00:00

Use ccount_freq directly to make the code a little more readable.

Signed-off-by: Baruch Siach 
Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

of: Specify initrd location using 64-bit

2013-07-24T10:10:01+00:00

On some PAE architectures, the entire range of physical memory could reside
outside the 32-bit limit.  These systems need the ability to specify the
initrd location using 64-bit numbers.

This patch globally modifies the early_init_dt_setup_initrd_arch() function to
use 64-bit numbers instead of the current unsigned long.

There has been quite a bit of debate about whether to use u64 or phys_addr_t.
It was concluded to stick to u64 to be consistent with rest of the device
tree code. As summarized by Geert, "The address to load the initrd is decided
by the bootloader/user and set at that point later in time. The dtb should not
be tied to the kernel you are booting"

More details on the discussion can be found here:
https://lkml.org/lkml/2013/6/20/690
https://lkml.org/lkml/2012/9/13/544

Signed-off-by: Santosh Shilimkar 
Acked-by: Rob Herring 
Acked-by: Vineet Gupta 
Acked-by: Jean-Christophe PLAGNIOL-VILLARD 
Signed-off-by: Grant Likely

xtensa: Flat DeviceTree copy not future-safe

2013-07-08T08:18:57+00:00

flat DT copy code calls bootmem allocator with @align = 0.
This is probably OK with legacy allocator which xtensa uses right now,
but this will panic right away with memblock allocator

Signed-off-by: Vineet Gupta 
Cc: Chris Zankel 
Cc: Max Filippov 
Cc: Marc Gauthier 
Cc: linux-xtensa@linux-xtensa.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Max Filippov 
Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: adjust boot parameters address when INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX is selected

2013-07-08T08:18:56+00:00

The virtual address of boot parameters chain is passed to the kernel via
a2 register. Adjust it in case it is remapped during MMUv3 -> MMUv2
mapping change, i.e. when it is in the first 128M.

Also fix interpretation of initrd and FDT addresses passed in the boot
parameters: these are physical addresses.

Cc: stable@vger.kernel.org
Reported-by: Baruch Siach 
Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: dispatch medium-priority interrupts

2013-02-24T03:12:52+00:00

Add support for dispatching medium-priority interrupts, that is,
interrupts of priority levels 2 to EXCM_LEVEL. IRQ handling may be
preempted by higher priority IRQ.

Signed-off-by: Marc Gauthier 
Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: clean up files to make them code-style compliant

2012-12-19T05:10:25+00:00

Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.

Signed-off-by: Chris Zankel

xtensa: add device trees support

2012-12-19T05:10:23+00:00

Device trees allow specification of hardware topology and device
parameters at runtime instead of hard-coding them in platform setup
code. This allows running single binary kernel on a range of compatible
boards.

New boot parameters tag BP_TAG_FDT is allocated and a pointer to flat
device tree is passed in it.

Note that current interrupt mapping scheme uses single cell for
interrupt identification. That means that IRQ numbers used in DTS must
be CPU internal IRQ numbers, not external. It is possible to extend
interrupt identification to two cells, and use second cell to tell
external IRQ numbers form internal. That would allow to use single DTS
on multiple boards with different mapping of external IRQ numbers.

Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: add s32c1i sanity check

2012-12-19T05:10:22+00:00

Add a brief sanity test of S32C1I functionality.  This instruction
is needed by the kernel and userland as part of the base ABI
(including GCC atomic builtins, certain threading packages, future
atomic support in the C++ standard, etc).  However, correct operation
of this instruction requires some cooperation by hardware external to
the processor (such as bus bridge, bus fabric, or memory controller).
Minimally exercising this mechanism and reporting explicit status
early in the boot process is helpful to chip vendors using the Linux
kernel as a benchmark of correctness of hardware.

As it turns out, S32C1I is not exercised by the kernel and by uClibc
based userland as of early June 2008.  This is expected to change
soon as both incorporate more recent open source developments.

Signed-off-by: Marc Gauthier 
Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel

xtensa: display s32c1i feature flag in cpuinfo

2012-12-19T05:10:21+00:00

Signed-off-by: Max Filippov 
Signed-off-by: Chris Zankel