<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/arch/x86/kernel/cpu, branch v3.7</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'please-pull-tangchen' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras into x86/urgent</title>
<updated>2012-11-13T18:01:01+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@kernel.org</email>
</author>
<published>2012-11-13T18:01:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=226f69a4b7ed1da248d653aa1535bad61ba5fa49'/>
<id>226f69a4b7ed1da248d653aa1535bad61ba5fa49</id>
<content type='text'>
Pull MCE fix from Tony Luck:

   "Fix problem in CMCI rediscovery code that was illegally
    migrating worker threads to other cpus."

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull MCE fix from Tony Luck:

   "Fix problem in CMCI rediscovery code that was illegally
    migrating worker threads to other cpus."

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, amd: Disable way access filter on Piledriver CPUs</title>
<updated>2012-10-31T20:06:55+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@amd.com</email>
</author>
<published>2012-10-31T16:20:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2bbf0a1427c377350f001fbc6260995334739ad7'/>
<id>2bbf0a1427c377350f001fbc6260995334739ad7</id>
<content type='text'>
The Way Access Filter in recent AMD CPUs may hurt the performance of
some workloads, caused by aliasing issues in the L1 cache.
This patch disables it on the affected CPUs.

The issue is similar to that one of last year:
http://lkml.indiana.edu/hypermail/linux/kernel/1107.3/00041.html
This new patch does not replace the old one, we just need another
quirk for newer CPUs.

The performance penalty without the patch depends on the
circumstances, but is a bit less than the last year's 3%.

The workloads affected would be those that access code from the same
physical page under different virtual addresses, so different
processes using the same libraries with ASLR or multiple instances of
PIE-binaries. The code needs to be accessed simultaneously from both
cores of the same compute unit.

More details can be found here:
http://developer.amd.com/Assets/SharedL1InstructionCacheonAMD15hCPU.pdf

CPUs affected are anything with the core known as Piledriver.
That includes the new parts of the AMD A-Series (aka Trinity) and the
just released new CPUs of the FX-Series (aka Vishera).
The model numbering is a bit odd here: FX CPUs have model 2,
A-Series has model 10h, with possible extensions to 1Fh. Hence the
range of model ids.

Signed-off-by: Andre Przywara &lt;osp@andrep.de&gt;
Link: http://lkml.kernel.org/r/1351700450-9277-1-git-send-email-osp@andrep.de
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Way Access Filter in recent AMD CPUs may hurt the performance of
some workloads, caused by aliasing issues in the L1 cache.
This patch disables it on the affected CPUs.

The issue is similar to that one of last year:
http://lkml.indiana.edu/hypermail/linux/kernel/1107.3/00041.html
This new patch does not replace the old one, we just need another
quirk for newer CPUs.

The performance penalty without the patch depends on the
circumstances, but is a bit less than the last year's 3%.

The workloads affected would be those that access code from the same
physical page under different virtual addresses, so different
processes using the same libraries with ASLR or multiple instances of
PIE-binaries. The code needs to be accessed simultaneously from both
cores of the same compute unit.

More details can be found here:
http://developer.amd.com/Assets/SharedL1InstructionCacheonAMD15hCPU.pdf

CPUs affected are anything with the core known as Piledriver.
That includes the new parts of the AMD A-Series (aka Trinity) and the
just released new CPUs of the FX-Series (aka Vishera).
The model numbering is a bit odd here: FX CPUs have model 2,
A-Series has model 10h, with possible extensions to 1Fh. Hence the
range of model ids.

Signed-off-by: Andre Przywara &lt;osp@andrep.de&gt;
Link: http://lkml.kernel.org/r/1351700450-9277-1-git-send-email-osp@andrep.de
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/mce: Do not change worker's running cpu in cmci_rediscover().</title>
<updated>2012-10-30T21:38:12+00:00</updated>
<author>
<name>Tang Chen</name>
<email>tangchen@cn.fujitsu.com</email>
</author>
<published>2012-10-29T03:01:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=85b97637bb40a9f486459dd254598759af9c3d50'/>
<id>85b97637bb40a9f486459dd254598759af9c3d50</id>
<content type='text'>
cmci_rediscover() used set_cpus_allowed_ptr() to change the current process's
running cpu, and migrate itself to the dest cpu. But worker processes are not
allowed to be migrated. If current is a worker, the worker will be migrated to
another cpu, but the corresponding  worker_pool is still on the original cpu.

In this case, the following BUG_ON in try_to_wake_up_local() will be triggered:
BUG_ON(rq != this_rq());

This will cause the kernel panic. The call trace is like the following:

[ 6155.451107] ------------[ cut here ]------------
[ 6155.452019] kernel BUG at kernel/sched/core.c:1654!
......
[ 6155.452019] RIP: 0010:[&lt;ffffffff810add15&gt;]  [&lt;ffffffff810add15&gt;] try_to_wake_up_local+0x115/0x130
......
[ 6155.452019] Call Trace:
[ 6155.452019]  [&lt;ffffffff8166fc14&gt;] __schedule+0x764/0x880
[ 6155.452019]  [&lt;ffffffff81670059&gt;] schedule+0x29/0x70
[ 6155.452019]  [&lt;ffffffff8166de65&gt;] schedule_timeout+0x235/0x2d0
[ 6155.452019]  [&lt;ffffffff810db57d&gt;] ? mark_held_locks+0x8d/0x140
[ 6155.452019]  [&lt;ffffffff810dd463&gt;] ? __lock_release+0x133/0x1a0
[ 6155.452019]  [&lt;ffffffff81671c50&gt;] ? _raw_spin_unlock_irq+0x30/0x50
[ 6155.452019]  [&lt;ffffffff810db8f5&gt;] ? trace_hardirqs_on_caller+0x105/0x190
[ 6155.452019]  [&lt;ffffffff8166fefb&gt;] wait_for_common+0x12b/0x180
[ 6155.452019]  [&lt;ffffffff810b0b30&gt;] ? try_to_wake_up+0x2f0/0x2f0
[ 6155.452019]  [&lt;ffffffff8167002d&gt;] wait_for_completion+0x1d/0x20
[ 6155.452019]  [&lt;ffffffff8110008a&gt;] stop_one_cpu+0x8a/0xc0
[ 6155.452019]  [&lt;ffffffff810abd40&gt;] ? __migrate_task+0x1a0/0x1a0
[ 6155.452019]  [&lt;ffffffff810a6ab8&gt;] ? complete+0x28/0x60
[ 6155.452019]  [&lt;ffffffff810b0fd8&gt;] set_cpus_allowed_ptr+0x128/0x130
[ 6155.452019]  [&lt;ffffffff81036785&gt;] cmci_rediscover+0xf5/0x140
[ 6155.452019]  [&lt;ffffffff816643c0&gt;] mce_cpu_callback+0x18d/0x19d
[ 6155.452019]  [&lt;ffffffff81676187&gt;] notifier_call_chain+0x67/0x150
[ 6155.452019]  [&lt;ffffffff810a03de&gt;] __raw_notifier_call_chain+0xe/0x10
[ 6155.452019]  [&lt;ffffffff81070470&gt;] __cpu_notify+0x20/0x40
[ 6155.452019]  [&lt;ffffffff810704a5&gt;] cpu_notify_nofail+0x15/0x30
[ 6155.452019]  [&lt;ffffffff81655182&gt;] _cpu_down+0x262/0x2e0
[ 6155.452019]  [&lt;ffffffff81655236&gt;] cpu_down+0x36/0x50
[ 6155.452019]  [&lt;ffffffff813d3eaa&gt;] acpi_processor_remove+0x50/0x11e
[ 6155.452019]  [&lt;ffffffff813a6978&gt;] acpi_device_remove+0x90/0xb2
[ 6155.452019]  [&lt;ffffffff8143cbec&gt;] __device_release_driver+0x7c/0xf0
[ 6155.452019]  [&lt;ffffffff8143cd6f&gt;] device_release_driver+0x2f/0x50
[ 6155.452019]  [&lt;ffffffff813a7870&gt;] acpi_bus_remove+0x32/0x6d
[ 6155.452019]  [&lt;ffffffff813a7932&gt;] acpi_bus_trim+0x87/0xee
[ 6155.452019]  [&lt;ffffffff813a7a21&gt;] acpi_bus_hot_remove_device+0x88/0x16b
[ 6155.452019]  [&lt;ffffffff813a33ee&gt;] acpi_os_execute_deferred+0x27/0x34
[ 6155.452019]  [&lt;ffffffff81090589&gt;] process_one_work+0x219/0x680
[ 6155.452019]  [&lt;ffffffff81090528&gt;] ? process_one_work+0x1b8/0x680
[ 6155.452019]  [&lt;ffffffff813a33c7&gt;] ? acpi_os_wait_events_complete+0x23/0x23
[ 6155.452019]  [&lt;ffffffff810923be&gt;] worker_thread+0x12e/0x320
[ 6155.452019]  [&lt;ffffffff81092290&gt;] ? manage_workers+0x110/0x110
[ 6155.452019]  [&lt;ffffffff81098396&gt;] kthread+0xc6/0xd0
[ 6155.452019]  [&lt;ffffffff8167c4c4&gt;] kernel_thread_helper+0x4/0x10
[ 6155.452019]  [&lt;ffffffff81671f30&gt;] ? retint_restore_args+0x13/0x13
[ 6155.452019]  [&lt;ffffffff810982d0&gt;] ? __init_kthread_worker+0x70/0x70
[ 6155.452019]  [&lt;ffffffff8167c4c0&gt;] ? gs_change+0x13/0x13

This patch removes the set_cpus_allowed_ptr() call, and put the cmci rediscover
jobs onto all the other cpus using system_wq. This could bring some delay for
the jobs.

Signed-off-by: Tang Chen &lt;tangchen@cn.fujitsu.com&gt;
Signed-off-by: Miao Xie &lt;miaox@cn.fujitsu.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
cmci_rediscover() used set_cpus_allowed_ptr() to change the current process's
running cpu, and migrate itself to the dest cpu. But worker processes are not
allowed to be migrated. If current is a worker, the worker will be migrated to
another cpu, but the corresponding  worker_pool is still on the original cpu.

In this case, the following BUG_ON in try_to_wake_up_local() will be triggered:
BUG_ON(rq != this_rq());

This will cause the kernel panic. The call trace is like the following:

[ 6155.451107] ------------[ cut here ]------------
[ 6155.452019] kernel BUG at kernel/sched/core.c:1654!
......
[ 6155.452019] RIP: 0010:[&lt;ffffffff810add15&gt;]  [&lt;ffffffff810add15&gt;] try_to_wake_up_local+0x115/0x130
......
[ 6155.452019] Call Trace:
[ 6155.452019]  [&lt;ffffffff8166fc14&gt;] __schedule+0x764/0x880
[ 6155.452019]  [&lt;ffffffff81670059&gt;] schedule+0x29/0x70
[ 6155.452019]  [&lt;ffffffff8166de65&gt;] schedule_timeout+0x235/0x2d0
[ 6155.452019]  [&lt;ffffffff810db57d&gt;] ? mark_held_locks+0x8d/0x140
[ 6155.452019]  [&lt;ffffffff810dd463&gt;] ? __lock_release+0x133/0x1a0
[ 6155.452019]  [&lt;ffffffff81671c50&gt;] ? _raw_spin_unlock_irq+0x30/0x50
[ 6155.452019]  [&lt;ffffffff810db8f5&gt;] ? trace_hardirqs_on_caller+0x105/0x190
[ 6155.452019]  [&lt;ffffffff8166fefb&gt;] wait_for_common+0x12b/0x180
[ 6155.452019]  [&lt;ffffffff810b0b30&gt;] ? try_to_wake_up+0x2f0/0x2f0
[ 6155.452019]  [&lt;ffffffff8167002d&gt;] wait_for_completion+0x1d/0x20
[ 6155.452019]  [&lt;ffffffff8110008a&gt;] stop_one_cpu+0x8a/0xc0
[ 6155.452019]  [&lt;ffffffff810abd40&gt;] ? __migrate_task+0x1a0/0x1a0
[ 6155.452019]  [&lt;ffffffff810a6ab8&gt;] ? complete+0x28/0x60
[ 6155.452019]  [&lt;ffffffff810b0fd8&gt;] set_cpus_allowed_ptr+0x128/0x130
[ 6155.452019]  [&lt;ffffffff81036785&gt;] cmci_rediscover+0xf5/0x140
[ 6155.452019]  [&lt;ffffffff816643c0&gt;] mce_cpu_callback+0x18d/0x19d
[ 6155.452019]  [&lt;ffffffff81676187&gt;] notifier_call_chain+0x67/0x150
[ 6155.452019]  [&lt;ffffffff810a03de&gt;] __raw_notifier_call_chain+0xe/0x10
[ 6155.452019]  [&lt;ffffffff81070470&gt;] __cpu_notify+0x20/0x40
[ 6155.452019]  [&lt;ffffffff810704a5&gt;] cpu_notify_nofail+0x15/0x30
[ 6155.452019]  [&lt;ffffffff81655182&gt;] _cpu_down+0x262/0x2e0
[ 6155.452019]  [&lt;ffffffff81655236&gt;] cpu_down+0x36/0x50
[ 6155.452019]  [&lt;ffffffff813d3eaa&gt;] acpi_processor_remove+0x50/0x11e
[ 6155.452019]  [&lt;ffffffff813a6978&gt;] acpi_device_remove+0x90/0xb2
[ 6155.452019]  [&lt;ffffffff8143cbec&gt;] __device_release_driver+0x7c/0xf0
[ 6155.452019]  [&lt;ffffffff8143cd6f&gt;] device_release_driver+0x2f/0x50
[ 6155.452019]  [&lt;ffffffff813a7870&gt;] acpi_bus_remove+0x32/0x6d
[ 6155.452019]  [&lt;ffffffff813a7932&gt;] acpi_bus_trim+0x87/0xee
[ 6155.452019]  [&lt;ffffffff813a7a21&gt;] acpi_bus_hot_remove_device+0x88/0x16b
[ 6155.452019]  [&lt;ffffffff813a33ee&gt;] acpi_os_execute_deferred+0x27/0x34
[ 6155.452019]  [&lt;ffffffff81090589&gt;] process_one_work+0x219/0x680
[ 6155.452019]  [&lt;ffffffff81090528&gt;] ? process_one_work+0x1b8/0x680
[ 6155.452019]  [&lt;ffffffff813a33c7&gt;] ? acpi_os_wait_events_complete+0x23/0x23
[ 6155.452019]  [&lt;ffffffff810923be&gt;] worker_thread+0x12e/0x320
[ 6155.452019]  [&lt;ffffffff81092290&gt;] ? manage_workers+0x110/0x110
[ 6155.452019]  [&lt;ffffffff81098396&gt;] kthread+0xc6/0xd0
[ 6155.452019]  [&lt;ffffffff8167c4c4&gt;] kernel_thread_helper+0x4/0x10
[ 6155.452019]  [&lt;ffffffff81671f30&gt;] ? retint_restore_args+0x13/0x13
[ 6155.452019]  [&lt;ffffffff810982d0&gt;] ? __init_kthread_worker+0x70/0x70
[ 6155.452019]  [&lt;ffffffff8167c4c0&gt;] ? gs_change+0x13/0x13

This patch removes the set_cpus_allowed_ptr() call, and put the cmci rediscover
jobs onto all the other cpus using system_wq. This could bring some delay for
the jobs.

Signed-off-by: Tang Chen &lt;tangchen@cn.fujitsu.com&gt;
Signed-off-by: Miao Xie &lt;miaox@cn.fujitsu.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, AMD: Change Boris' email address</title>
<updated>2012-10-30T09:05:50+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@alien8.de</email>
</author>
<published>2012-10-29T17:40:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e6d41e8c697e07832efa4a85bf23438bc4c4e1b2'/>
<id>e6d41e8c697e07832efa4a85bf23438bc4c4e1b2</id>
<content type='text'>
Move to private email and put in maintained status.

Signed-off-by: Borislav Petkov &lt;bp@alien8.de&gt;
Link: http://lkml.kernel.org/r/1351532410-4887-1-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move to private email and put in maintained status.

Signed-off-by: Borislav Petkov &lt;bp@alien8.de&gt;
Link: http://lkml.kernel.org/r/1351532410-4887-1-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86: Remove unused variable in nhmex_rbox_alter_er()</title>
<updated>2012-10-24T10:51:40+00:00</updated>
<author>
<name>Wei Yongjun</name>
<email>yongjun_wei@trendmicro.com.cn</email>
</author>
<published>2012-10-22T08:51:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=64dfab8e83644902ad2fd559a56c411b47e3ef3c'/>
<id>64dfab8e83644902ad2fd559a56c411b47e3ef3c</id>
<content type='text'>
The variable port is initialized but never used
otherwise, so remove the unused variable.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun &lt;yongjun_wei@trendmicro.com.cn&gt;
Cc: Yan, Zheng &lt;zheng.z.yan@intel.com&gt;
Cc: a.p.zijlstra@chello.nl
Cc: paulus@samba.org
Cc: acme@ghostprotocols.net
Link: http://lkml.kernel.org/r/CAPgLHd8NZkYSkZm22FpZxiEh6HcA0q-V%3D29vdnheiDhgrJZ%2Byw@mail.gmail.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The variable port is initialized but never used
otherwise, so remove the unused variable.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun &lt;yongjun_wei@trendmicro.com.cn&gt;
Cc: Yan, Zheng &lt;zheng.z.yan@intel.com&gt;
Cc: a.p.zijlstra@chello.nl
Cc: paulus@samba.org
Cc: acme@ghostprotocols.net
Link: http://lkml.kernel.org/r/CAPgLHd8NZkYSkZm22FpZxiEh6HcA0q-V%3D29vdnheiDhgrJZ%2Byw@mail.gmail.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86: Enable overflow on Intel KNC with a custom knc_pmu_handle_irq()</title>
<updated>2012-10-24T10:00:49+00:00</updated>
<author>
<name>Vince Weaver</name>
<email>vincent.weaver@maine.edu</email>
</author>
<published>2012-10-17T17:05:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e4074b3049f99c6ad6e1a33e6d93d8ec0652e2c1'/>
<id>e4074b3049f99c6ad6e1a33e6d93d8ec0652e2c1</id>
<content type='text'>
Although based on the Intel P6 design, the interrupt mechnanism
for KNC more closely resembles the Intel architectural
perfmon one.

We can't just re-use that code though, because KNC has different
MSR numbers for the status and ack registers.

In this case we just cut-and paste from perf_event_intel.c
with some minor changes, as it looks like it would not be
worth the trouble to change that code to be MSR-configurable.

Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@ghostprotocols.net&gt;
Cc: eranian@gmail.com
Cc: Meadows Lawrence F &lt;lawrence.f.meadows@intel.com&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210171304410.23243@vincent-weaver-1.um.maine.edu
[ Small stylistic edits. ]
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Although based on the Intel P6 design, the interrupt mechnanism
for KNC more closely resembles the Intel architectural
perfmon one.

We can't just re-use that code though, because KNC has different
MSR numbers for the status and ack registers.

In this case we just cut-and paste from perf_event_intel.c
with some minor changes, as it looks like it would not be
worth the trouble to change that code to be MSR-configurable.

Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@ghostprotocols.net&gt;
Cc: eranian@gmail.com
Cc: Meadows Lawrence F &lt;lawrence.f.meadows@intel.com&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210171304410.23243@vincent-weaver-1.um.maine.edu
[ Small stylistic edits. ]
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86: Remove cpuc-&gt;enable check on Intl KNC event enable/disable</title>
<updated>2012-10-24T10:00:49+00:00</updated>
<author>
<name>Vince Weaver</name>
<email>vincent.weaver@maine.edu</email>
</author>
<published>2012-10-17T17:04:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7d011962afbaa6e572cd8e0dbb7abf773e166e64'/>
<id>7d011962afbaa6e572cd8e0dbb7abf773e166e64</id>
<content type='text'>
x86_pmu.enable() is called from x86_pmu_enable() with
cpuc-&gt;enabled set to 0.  This means we weren't re-enabling the
counters after a context switch.

This patch just removes the check, as it should't be necessary
(and the equivelent x86_ generic code does not have the checks).

The origin of this problem is the KNC driver being based on the
P6 one.   The P6 driver also has this issue, but works anyway
due to various lucky accidents.

Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@ghostprotocols.net&gt;
Cc: eranian@gmail.com
Cc: Meadows
Cc: Lawrence F &lt;lawrence.f.meadows@intel.com&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210171303290.23243@vincent-weaver-1.um.maine.edu
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
x86_pmu.enable() is called from x86_pmu_enable() with
cpuc-&gt;enabled set to 0.  This means we weren't re-enabling the
counters after a context switch.

This patch just removes the check, as it should't be necessary
(and the equivelent x86_ generic code does not have the checks).

The origin of this problem is the KNC driver being based on the
P6 one.   The P6 driver also has this issue, but works anyway
due to various lucky accidents.

Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@ghostprotocols.net&gt;
Cc: eranian@gmail.com
Cc: Meadows
Cc: Lawrence F &lt;lawrence.f.meadows@intel.com&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210171303290.23243@vincent-weaver-1.um.maine.edu
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86: Make Intel KNC use full 40-bit width of counters</title>
<updated>2012-10-24T10:00:48+00:00</updated>
<author>
<name>Vince Weaver</name>
<email>vincent.weaver@maine.edu</email>
</author>
<published>2012-10-17T17:03:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ae5ba47a990a18c869d66916fd72fb334c45cf91'/>
<id>ae5ba47a990a18c869d66916fd72fb334c45cf91</id>
<content type='text'>
Early versions of Intel KNC chips have a bug where bits above 32
were not properly set.  We worked around this by only using the
bottom 32 bits (out of 40 that should be available).

It turns out this workaround breaks overflow handling.

The buggy silicon will in theory never be used in production
systems, so remove this workaround so we get proper overflow
support.

Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@ghostprotocols.net&gt;
Cc: eranian@gmail.com
Cc: Meadows Lawrence F &lt;lawrence.f.meadows@intel.com&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210171302140.23243@vincent-weaver-1.um.maine.edu
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Early versions of Intel KNC chips have a bug where bits above 32
were not properly set.  We worked around this by only using the
bottom 32 bits (out of 40 that should be available).

It turns out this workaround breaks overflow handling.

The buggy silicon will in theory never be used in production
systems, so remove this workaround so we get proper overflow
support.

Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@ghostprotocols.net&gt;
Cc: eranian@gmail.com
Cc: Meadows Lawrence F &lt;lawrence.f.meadows@intel.com&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210171302140.23243@vincent-weaver-1.um.maine.edu
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86/uncore: Handle pci_read_config_dword() errors</title>
<updated>2012-10-24T08:57:03+00:00</updated>
<author>
<name>Yan, Zheng</name>
<email>zheng.z.yan@intel.com</email>
</author>
<published>2012-10-24T08:42:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=032c3851f51141e30de02ed0bc50a7743dfd776d'/>
<id>032c3851f51141e30de02ed0bc50a7743dfd776d</id>
<content type='text'>
This, beyond handling corner cases, also fixes some build warnings:

 arch/x86/kernel/cpu/perf_event_intel_uncore.c: In function ‘snbep_uncore_pci_disable_box’:
 arch/x86/kernel/cpu/perf_event_intel_uncore.c:124:9: warning: ‘config’ is used uninitialized in this function [-Wuninitialized]
 arch/x86/kernel/cpu/perf_event_intel_uncore.c: In function ‘snbep_uncore_pci_enable_box’:
 arch/x86/kernel/cpu/perf_event_intel_uncore.c:135:9: warning: ‘config’ is used uninitialized in this function [-Wuninitialized]
 arch/x86/kernel/cpu/perf_event_intel_uncore.c: In function ‘snbep_uncore_pci_read_counter’:
 arch/x86/kernel/cpu/perf_event_intel_uncore.c:164:2: warning: ‘count’ is used uninitialized in this function [-Wuninitialized]

Signed-off-by: Yan, Zheng &lt;zheng.z.yan@intel.com&gt;
Cc: a.p.zijlstra@chello.nl
Link: http://lkml.kernel.org/r/1351068140-13456-1-git-send-email-zheng.z.yan@intel.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This, beyond handling corner cases, also fixes some build warnings:

 arch/x86/kernel/cpu/perf_event_intel_uncore.c: In function ‘snbep_uncore_pci_disable_box’:
 arch/x86/kernel/cpu/perf_event_intel_uncore.c:124:9: warning: ‘config’ is used uninitialized in this function [-Wuninitialized]
 arch/x86/kernel/cpu/perf_event_intel_uncore.c: In function ‘snbep_uncore_pci_enable_box’:
 arch/x86/kernel/cpu/perf_event_intel_uncore.c:135:9: warning: ‘config’ is used uninitialized in this function [-Wuninitialized]
 arch/x86/kernel/cpu/perf_event_intel_uncore.c: In function ‘snbep_uncore_pci_read_counter’:
 arch/x86/kernel/cpu/perf_event_intel_uncore.c:164:2: warning: ‘count’ is used uninitialized in this function [-Wuninitialized]

Signed-off-by: Yan, Zheng &lt;zheng.z.yan@intel.com&gt;
Cc: a.p.zijlstra@chello.nl
Link: http://lkml.kernel.org/r/1351068140-13456-1-git-send-email-zheng.z.yan@intel.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86: Remove P6 cpuc-&gt;enabled check</title>
<updated>2012-10-24T08:32:00+00:00</updated>
<author>
<name>Vince Weaver</name>
<email>vincent.weaver@maine.edu</email>
</author>
<published>2012-10-19T21:33:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=58e9eaf06f5476cb2192ec1d012674ce5e79dd21'/>
<id>58e9eaf06f5476cb2192ec1d012674ce5e79dd21</id>
<content type='text'>
Between 2.6.33 and 2.6.34 the PMU code was made modular.

The x86_pmu_enable() call was extended to disable cpuc-&gt;enabled
and iterate the counters, enabling one at a time, before calling
enable_all() at the end, followed by re-enabling cpuc-&gt;enabled.

Since cpuc-&gt;enabled was set to 0, that change effectively caused
the "val |= ARCH_PERFMON_EVENTSEL_ENABLE;" code in p6_pmu_enable_event()
and p6_pmu_disable_event() to be dead code that was never called.

This change removes this code (which was confusing) and adds some
extra commentary to make it more clear what is going on.

Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Signed-off-by: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210191732000.14552@vincent-weaver-1.um.maine.edu
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Between 2.6.33 and 2.6.34 the PMU code was made modular.

The x86_pmu_enable() call was extended to disable cpuc-&gt;enabled
and iterate the counters, enabling one at a time, before calling
enable_all() at the end, followed by re-enabling cpuc-&gt;enabled.

Since cpuc-&gt;enabled was set to 0, that change effectively caused
the "val |= ARCH_PERFMON_EVENTSEL_ENABLE;" code in p6_pmu_enable_event()
and p6_pmu_disable_event() to be dead code that was never called.

This change removes this code (which was confusing) and adds some
extra commentary to make it more clear what is going on.

Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
Signed-off-by: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210191732000.14552@vincent-weaver-1.um.maine.edu
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
