linux-stable.git/arch/x86/kernel/cpu/centaur.c, branch linux-rolling-stable

x86/cpu: Use common topology code for Centaur and Zhaoxin

2024-02-15T21:07:37+00:00

Centaur and Zhaoxin CPUs use only the legacy SMP detection. Remove the
invocations from their 32bit path and exclude them from the 64-bit call
path.

No functional change intended.

Signed-off-by: Thomas Gleixner 
Tested-by: Juergen Gross 
Tested-by: Sohil Mehta 
Tested-by: Michael Kelley 
Tested-by: Zhang Rui 
Tested-by: Wang Wendy 
Tested-by: K Prateek Nayak 
Link: https://lore.kernel.org/r/20240212153624.706794189@linutronix.de

x86/cpu/centaur: Add Centaur family >=7 CPUs initialization support

2020-09-11T08:53:19+00:00

Add Centaur family >=7 CPUs specific initialization support.

Signed-off-by: Tony W Wang-oc 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/1599562666-31351-3-git-send-email-TonyWWang-oc@zhaoxin.com

x86/cpu/centaur: Replace two-condition switch-case with an if statement

2020-09-11T08:50:01+00:00

Use a normal if statements instead of a two-condition switch-case.

 [ bp: Massage commit message. ]

Signed-off-by: Tony W Wang-oc 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/1599562666-31351-2-git-send-email-TonyWWang-oc@zhaoxin.com

x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup

2020-06-15T12:18:37+00:00

Reinitialize IA32_FEAT_CTL on the BSP during wakeup to handle the case
where firmware doesn't initialize or save/restore across S3.  This fixes
a bug where IA32_FEAT_CTL is left uninitialized and results in VMXON
taking a #GP due to VMX not being fully enabled, i.e. breaks KVM.

Use init_ia32_feat_ctl() to "restore" IA32_FEAT_CTL as it already deals
with the case where the MSR is locked, and because APs already redo
init_ia32_feat_ctl() during suspend by virtue of the SMP boot flow being
used to reinitialize APs upon wakeup.  Do the call in the early wakeup
flow to avoid dependencies in the syscore_ops chain, e.g. simply adding
a resume hook is not guaranteed to work, as KVM does VMXON in its own
resume hook, kvm_resume(), when KVM has active guests.

Fixes: 21bd3467a58e ("KVM: VMX: Drop initialization of IA32_FEAT_CTL MSR")
Reported-by: Brad Campbell 
Signed-off-by: Sean Christopherson 
Signed-off-by: Borislav Petkov 
Reviewed-by: Liam Merwick 
Reviewed-by: Maxim Levitsky 
Tested-by: Brad Campbell 
Cc: stable@vger.kernel.org # v5.6
Link: https://lkml.kernel.org/r/20200608174134.11157-1-sean.j.christopherson@intel.com

x86/cpu: Remove redundant cpu_detect_cache_sizes() call

2020-01-20T15:32:35+00:00

Both functions call init_intel_cacheinfo() which computes L2 and L3 cache
sizes from CPUID(4). But then they also call cpu_detect_cache_sizes() a
bit later which computes ->x86_tlbsize and L2 size from CPUID(80000006).

However, the latter call is not needed because

 - on these CPUs, CPUID(80000006).EBX for ->x86_tlbsize is reserved

 - CPUID(80000006).ECX for the L2 size has the same result as CPUID(4)

Therefore, remove the latter call to simplify the code.

 [ bp: Rewrite commit message. ]

Signed-off-by: Tony W Wang-oc 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/1579075257-6985-1-git-send-email-TonyWWang-oc@zhaoxin.com

x86/cpu: Set synthetic VMX cpufeatures during init_ia32_feat_ctl()

2020-01-13T17:43:19+00:00

Set the synthetic VMX cpufeatures, which need to be kept to preserve
/proc/cpuinfo's ABI, in the common IA32_FEAT_CTL initialization code.
Remove the vendor code that manually sets the synthetic flags.

Signed-off-by: Sean Christopherson 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20191221044513.21680-13-sean.j.christopherson@intel.com

x86/centaur: Use common IA32_FEAT_CTL MSR initialization

2020-01-13T16:48:36+00:00

Use the recently added IA32_FEAT_CTL MSR initialization sequence to
opportunistically enable VMX support when running on a Centaur CPU.

Signed-off-by: Sean Christopherson 
Signed-off-by: Borislav Petkov 
Link: https://lkml.kernel.org/r/20191221044513.21680-7-sean.j.christopherson@intel.com

x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores()

2018-05-13T14:14:24+00:00

No point to have it at the call sites.

Signed-off-by: Thomas Gleixner

x86/Centaur: Report correct CPU/cache topology

2018-05-13T14:14:24+00:00

Centaur CPUs enumerate the cache topology in the same way as Intel CPUs,
but the function is unused so for. The Centaur init code also misses to
initialize x86_info::max_cores, so the CPU topology can't be described
correctly.

Initialize x86_info::max_cores and invoke init_cacheinfo() to make
CPU and cache topology information available and correct.

Signed-off-by: David Wang 
Signed-off-by: Thomas Gleixner 
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: gregkh@linuxfoundation.org
Cc: brucechang@via-alliance.com
Cc: timguo@zhaoxin.com
Cc: cooperyan@zhaoxin.com
Cc: hpa@zytor.com
Cc: benjaminpan@viatech.com
Link: https://lkml.kernel.org/r/1525314766-18910-4-git-send-email-davidwang@zhaoxin.com

x86/Centaur: Initialize supported CPU features properly

2018-04-20T10:08:17+00:00

Centaur CPUs have some Intel compatible capabilities,including Permformance
Monitoring Counters and CPU virtualization capabilities. Initialize them in
the Centaur specific init code.

Signed-off-by: David Wang 
Signed-off-by: Thomas Gleixner 
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: gregkh@linuxfoundation.org
Cc: brucechang@via-alliance.com
Cc: timguo@zhaoxin.com
Cc: cooperyan@zhaoxin.com
Cc: hpa@zytor.com
Cc: benjaminpan@viatech.com
Link: https://lkml.kernel.org/r/1524212968-28998-1-git-send-email-davidwang@zhaoxin.com