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<title>linux-stable.git/arch/tile/kernel/intvec_64.S, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
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<entry>
<title>arch: remove tile port</title>
<updated>2018-03-16T09:56:03+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-03-09T13:13:42+00:00</published>
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<content type='text'>
The Tile architecture port was added by Chris Metcalf in 2010, and
maintained until early 2018 when he orphaned it due to his departure
from Mellanox, and nobody else stepped up to maintain it. The product
line is still around in the form of the BlueField SoC, but no longer
uses the Tile architecture.

There are also still products for sale with Tile-GX SoCs, notably the
Mikrotik CCR router family. The products all use old (linux-3.3) kernels
with lots of patches and won't be upgraded by their manufacturers. There
have been efforts to port both OpenWRT and Debian to these, but both
projects have stalled and are very unlikely to be continued in the future.

Given that we are reasonably sure that nobody is still using the port
with an upstream kernel any more, it seems better to remove it now while
the port is in a good shape than to let it bitrot for a few years first.

Cc: Chris Metcalf &lt;chris.d.metcalf@gmail.com&gt;
Cc: John Paul Adrian Glaubitz &lt;glaubitz@physik.fu-berlin.de&gt;
Link: http://www.mellanox.com/page/npu_multicore_overview
Link: https://jenkins.debian.net/view/rebootstrap/job/rebootstrap_tilegx_gcc7/
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
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<pre>
The Tile architecture port was added by Chris Metcalf in 2010, and
maintained until early 2018 when he orphaned it due to his departure
from Mellanox, and nobody else stepped up to maintain it. The product
line is still around in the form of the BlueField SoC, but no longer
uses the Tile architecture.

There are also still products for sale with Tile-GX SoCs, notably the
Mikrotik CCR router family. The products all use old (linux-3.3) kernels
with lots of patches and won't be upgraded by their manufacturers. There
have been efforts to port both OpenWRT and Debian to these, but both
projects have stalled and are very unlikely to be continued in the future.

Given that we are reasonably sure that nobody is still using the port
with an upstream kernel any more, it seems better to remove it now while
the port is in a good shape than to let it bitrot for a few years first.

Cc: Chris Metcalf &lt;chris.d.metcalf@gmail.com&gt;
Cc: John Paul Adrian Glaubitz &lt;glaubitz@physik.fu-berlin.de&gt;
Link: http://www.mellanox.com/page/npu_multicore_overview
Link: https://jenkins.debian.net/view/rebootstrap/job/rebootstrap_tilegx_gcc7/
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: move user_exit() to early kernel entry sequence</title>
<updated>2016-01-18T19:49:30+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@ezchip.com</email>
</author>
<published>2015-12-23T22:13:04+00:00</published>
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<id>1bb50cad45f4a3fb9a339006d76efc50f70eed5b</id>
<content type='text'>
This ensures that we always notify context tracking that we
have exited from user space no matter how we enter the kernel.
It is similar to how arm64 handles context tracking, for example.

This allows the removal of all the exception_enter() calls that
were added in commit 49e4e15619cd ("tile: support CONTEXT_TRACKING and
thus NOHZ_FULL").

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
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<pre>
This ensures that we always notify context tracking that we
have exited from user space no matter how we enter the kernel.
It is similar to how arm64 handles context tracking, for example.

This allows the removal of all the exception_enter() calls that
were added in commit 49e4e15619cd ("tile: support CONTEXT_TRACKING and
thus NOHZ_FULL").

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: fix bug in setting PT_FLAGS_DISABLE_IRQ on kernel entry</title>
<updated>2016-01-18T19:49:26+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@ezchip.com</email>
</author>
<published>2015-12-23T20:02:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9ce815ed50bbc518526106071f395deacaf94ad7'/>
<id>9ce815ed50bbc518526106071f395deacaf94ad7</id>
<content type='text'>
This flag value is saved in ptregs and used to decide whether
to disable irqs when returning from the kernel.  Commit 1168df528fe4
("tile: don't assume user privilege is zero") performed a bad
merge from some KVM-enabled code that had not yet been upstreamed.

The only issue with the old code is that we will read the interrupt
mask in more conditions than we need to (e.g., coming from user
space when user space has the Interrupt Critical Section bit set, or
coming from a guest kernel), which is a slow multi-cycle operation.
This change saves those few cycles in the common case.

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
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<pre>
This flag value is saved in ptregs and used to decide whether
to disable irqs when returning from the kernel.  Commit 1168df528fe4
("tile: don't assume user privilege is zero") performed a bad
merge from some KVM-enabled code that had not yet been upstreamed.

The only issue with the old code is that we will read the interrupt
mask in more conditions than we need to (e.g., coming from user
space when user space has the Interrupt Critical Section bit set, or
coming from a guest kernel), which is a slow multi-cycle operation.
This change saves those few cycles in the common case.

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: adopt prepare_exit_to_usermode() model from x86</title>
<updated>2016-01-18T19:49:09+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@ezchip.com</email>
</author>
<published>2015-09-22T18:49:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=583b24a210ada7e88fc12aaf50024975ec882816'/>
<id>583b24a210ada7e88fc12aaf50024975ec882816</id>
<content type='text'>
This change is a prerequisite change for TASK_ISOLATION but also
stands on its own for readability and maintainability.  The existing
tile do_work_pending() was called in a loop from assembly on
the slow path; this change moves the loop into C code as well.
For the x86 version see commit c5c46f59e4e7 ("x86/entry: Add new,
comprehensible entry and exit handlers written in C").

This change exposes a pre-existing bug on the older tilepro platform;
the singlestep processing is done last, but on tilepro (unlike tilegx)
we enable interrupts while doing that processing, so we could in
theory miss a signal or other asynchronous event.  A future change
could fix this by breaking the singlestep work into a "prepare"
step done in the main loop, and a "trigger" step done after exiting
the loop.  Since this change is intended as purely a restructuring
change, we call out the bug explicitly now, but don't yet fix it.

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</content>
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<pre>
This change is a prerequisite change for TASK_ISOLATION but also
stands on its own for readability and maintainability.  The existing
tile do_work_pending() was called in a loop from assembly on
the slow path; this change moves the loop into C code as well.
For the x86 version see commit c5c46f59e4e7 ("x86/entry: Add new,
comprehensible entry and exit handlers written in C").

This change exposes a pre-existing bug on the older tilepro platform;
the singlestep processing is done last, but on tilepro (unlike tilegx)
we enable interrupts while doing that processing, so we could in
theory miss a signal or other asynchronous event.  A future change
could fix this by breaking the singlestep work into a "prepare"
step done in the main loop, and a "trigger" step done after exiting
the loop.  Since this change is intended as purely a restructuring
change, we call out the bug explicitly now, but don't yet fix it.

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: enable full SECCOMP support</title>
<updated>2015-07-30T16:32:16+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@ezchip.com</email>
</author>
<published>2015-07-22T18:30:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a0ddef81f4aeeeec3326f6b6a255d8ea13b41908'/>
<id>a0ddef81f4aeeeec3326f6b6a255d8ea13b41908</id>
<content type='text'>
Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</content>
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<pre>
Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: support delivering NMIs for multicore backtrace</title>
<updated>2015-05-11T15:22:31+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@ezchip.com</email>
</author>
<published>2015-05-04T21:26:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e5701b74ccfdbbb0b4d9abcc7d0c569bf5e5375b'/>
<id>e5701b74ccfdbbb0b4d9abcc7d0c569bf5e5375b</id>
<content type='text'>
A new hypervisor service was added some time ago (MDE 4.2.1 or
later, or MDE 4.3 or later) that allows cores to request NMIs
to be delivered to other cores.  Use this facility to deliver
a request that causes a backtrace to be generated on each core,
and hook it into the magic SysRq functionality.

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</content>
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<pre>
A new hypervisor service was added some time ago (MDE 4.2.1 or
later, or MDE 4.3 or later) that allows cores to request NMIs
to be delivered to other cores.  Use this facility to deliver
a request that causes a backtrace to be generated on each core,
and hook it into the magic SysRq functionality.

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: Enable NMIs on return from handle_nmi() without errors</title>
<updated>2014-03-07T16:19:48+00:00</updated>
<author>
<name>Zhigang Lu</name>
<email>zlu@tilera.com</email>
</author>
<published>2014-01-27T08:25:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ba67823163c963de7f1f2d87526c9c87f3a3ea0b'/>
<id>ba67823163c963de7f1f2d87526c9c87f3a3ea0b</id>
<content type='text'>
NMI interrupts mask ALL interrupts before calling the handler,
so we need to unmask NMIs according to the value handle_nmi() returns.
If it returns zero, the NMIs should be re-enabled; if it returns
a non-zero error, the NMIs should be disabled.

Signed-off-by: Zhigang Lu &lt;zlu@tilera.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
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<pre>
NMI interrupts mask ALL interrupts before calling the handler,
so we need to unmask NMIs according to the value handle_nmi() returns.
If it returns zero, the NMIs should be re-enabled; if it returns
a non-zero error, the NMIs should be disabled.

Signed-off-by: Zhigang Lu &lt;zlu@tilera.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: Add support for handling PMC hardware</title>
<updated>2014-03-07T16:19:47+00:00</updated>
<author>
<name>Zhigang Lu</name>
<email>zlu@tilera.com</email>
</author>
<published>2014-01-27T07:11:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8e3441ebab48c3537b1a9ae06fb7616a3332bd35'/>
<id>8e3441ebab48c3537b1a9ae06fb7616a3332bd35</id>
<content type='text'>
The PMC module is used by perf_events, oprofile and watchdogs.

Signed-off-by: Zhigang Lu &lt;zlu@tilera.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
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<pre>
The PMC module is used by perf_events, oprofile and watchdogs.

Signed-off-by: Zhigang Lu &lt;zlu@tilera.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: ensure interrupts disabled for preempt_schedule_irq()</title>
<updated>2013-09-27T20:09:43+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2013-09-26T17:22:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3f725c5b924e14eb00c58892d21d92100121e5ce'/>
<id>3f725c5b924e14eb00c58892d21d92100121e5ce</id>
<content type='text'>
When coming from a page fault (for example), interrupts might
be enabled as we enter the code to return from interrupt.

Cc: stable@vger.kernel.org
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
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<pre>
When coming from a page fault (for example), interrupts might
be enabled as we enter the code to return from interrupt.

Cc: stable@vger.kernel.org
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: remove support for TILE64</title>
<updated>2013-09-03T18:53:29+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2013-08-15T20:23:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d7c9661115fd23b4dabb710b3080dd9919dfa891'/>
<id>d7c9661115fd23b4dabb710b3080dd9919dfa891</id>
<content type='text'>
This chip is no longer being actively developed for (it was superceded
by the TILEPro64 in 2008), and in any case the existing compiler and
toolchain in the community do not support it.  It's unlikely that the
kernel works with TILE64 at this point as the configuration has not been
tested in years.  The support is also awkward as it requires maintaining
a significant number of ifdefs.  So, just remove it altogether.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
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<pre>
This chip is no longer being actively developed for (it was superceded
by the TILEPro64 in 2008), and in any case the existing compiler and
toolchain in the community do not support it.  It's unlikely that the
kernel works with TILE64 at this point as the configuration has not been
tested in years.  The support is also awkward as it requires maintaining
a significant number of ifdefs.  So, just remove it altogether.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
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