linux-stable.git/arch/tile/include/asm/page.h, branch master

arch: remove tile port

2018-03-16T09:56:03+00:00

The Tile architecture port was added by Chris Metcalf in 2010, and
maintained until early 2018 when he orphaned it due to his departure
from Mellanox, and nobody else stepped up to maintain it. The product
line is still around in the form of the BlueField SoC, but no longer
uses the Tile architecture.

There are also still products for sale with Tile-GX SoCs, notably the
Mikrotik CCR router family. The products all use old (linux-3.3) kernels
with lots of patches and won't be upgraded by their manufacturers. There
have been efforts to port both OpenWRT and Debian to these, but both
projects have stalled and are very unlikely to be continued in the future.

Given that we are reasonably sure that nobody is still using the port
with an upstream kernel any more, it seems better to remove it now while
the port is in a good shape than to let it bitrot for a few years first.

Cc: Chris Metcalf 
Cc: John Paul Adrian Glaubitz 
Link: http://www.mellanox.com/page/npu_multicore_overview
Link: https://jenkins.debian.net/view/rebootstrap/job/rebootstrap_tilegx_gcc7/
Signed-off-by: Arnd Bergmann

Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile

2016-01-18T20:57:18+00:00

Pull arch/tile updates from Chris Metcalf:
 "This is a grab bag of changes that includes some NOHZ and
  context-tracking related changes, some debugging improvements,
  JUMP_LABEL support, and some fixes for tilepro allmodconfig support.

  We also remove the now-unused node_has_online_mem() definitions both
  for tile's asm/topology.h as well as in linux/topology.h itself"

* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
  numa: remove stale node_has_online_mem() define
  arch/tile: move user_exit() to early kernel entry sequence
  tile: fix bug in setting PT_FLAGS_DISABLE_IRQ on kernel entry
  tile: fix tilepro casts for readl, writel, etc
  tile: fix a -Wframe-larger-than warning
  tile: include the syscall number in the backtrace
  MAINTAINERS: add git URL for tile
  arch/tile: adopt prepare_exit_to_usermode() model from x86
  tile/jump_label: add jump label support for TILE-Gx
  tile: define a macro ktext_writable_addr to get writable kernel text address

tile: provide CONFIG_PAGE_SIZE_64KB etc for tilepro

2016-01-05T13:16:09+00:00

This allows the build system to know that it can't attempt to
configure the Lustre virtual block device, for example, when tilepro
is using 64KB pages (as it does by default).  The tilegx build
already provided those symbols.

Previously we required that the tilepro hypervisor be rebuilt with
a different hardcoded page size in its headers, and then Linux be
rebuilt using the updated hypervisor header.  Now we allow each of
the hypervisor and Linux to be built independently.  We still check
at boot time to ensure that the page size provided by the hypervisor
matches what Linux expects.

Signed-off-by: Chris Metcalf 
Cc: stable@vger.kernel.org [3.19+]

tile: define a macro ktext_writable_addr to get writable kernel text address

2016-01-04T20:09:31+00:00

It is used by kgdb, ftrace, kprobe and jump label, so we factor
this out into a helper routine.

Reviewed-by: Chris Metcalf 
Signed-off-by: Zhigang Lu 
Signed-off-by: Chris Metcalf

arm64,ia64,ppc,s390,sh,tile,um,x86,mm: remove default gate area

2014-08-08T22:57:27+00:00

The core mm code will provide a default gate area based on
FIXADDR_USER_START and FIXADDR_USER_END if
!defined(__HAVE_ARCH_GATE_AREA) && defined(AT_SYSINFO_EHDR).

This default is only useful for ia64.  arm64, ppc, s390, sh, tile, 64-bit
UML, and x86_32 have their own code just to disable it.  arm, 32-bit UML,
and x86_64 have gate areas, but they have their own implementations.

This gets rid of the default and moves the code into ia64.

This should save some code on architectures without a gate area: it's now
possible to inline the gate_area functions in the default case.

Signed-off-by: Andy Lutomirski 
Acked-by: Nathan Lynch 
Acked-by: H. Peter Anvin 
Acked-by: Benjamin Herrenschmidt  [in principle]
Acked-by: Richard Weinberger  [for um]
Acked-by: Will Deacon  [for arm64]
Cc: Catalin Marinas 
Cc: Will Deacon 
Cc: Tony Luck 
Cc: Fenghua Yu 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Martin Schwidefsky 
Cc: Heiko Carstens 
Cc: Chris Metcalf 
Cc: Jeff Dike 
Cc: Richard Weinberger 
Cc: Thomas Gleixner 
Cc: Ingo Molnar 
Cc: "H. Peter Anvin" 
Cc: Nathan Lynch 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

tile: remove HUGE_VMAP dead code

2013-09-13T15:15:24+00:00

A config option to allow a variant vmap() using huge pages that was never
upstreamed had some bits of code related to it scattered around the tile
architecture; the config option was removed downstream and this commit
cleans up the scattered evidence of it from the upstream as well.

Signed-off-by: Chris Metcalf

tile: add virt_to_kpte() API and clean up and document behavior

2013-09-03T18:52:13+00:00

We use virt_to_pte(NULL, va) a lot, which isn't very obvious.
I added virt_to_kpte(va) as a more obvious wrapper function,
that also validates the va as being a kernel adddress.

And, I fixed the semantics of virt_to_pte() so that we handle
the pud and pmd the same way, and we now document the fact that
we handle the final pte level differently.

Signed-off-by: Chris Metcalf

tile: parameterize VA and PA space more cleanly

2013-09-03T18:47:34+00:00

The existing code relied on the hardware definition ()
to specify how much VA and PA space was available.  It's convenient
to allow customizing this for some configurations, so provide symbols
MAX_PA_WIDTH and MAX_VA_WIDTH in  that can be modified
if desired.

Additionally, move away from the MEM_XX_INTRPT nomenclature to
define the start of various regions within the VA space.  In fact
the cleaner symbol is, for example, MEM_SV_START, to indicate the
start of the area used for supervisor code; the actual address of the
interrupt vectors is not as important, and can be changed if desired.
As part of this change, convert from "intrpt1" nomenclature (which
built in the old privilege-level 1 model) to a simple "intrpt".

Also strip out some tilepro-specific code supporting modifying the
PL the kernel could run at, since we don't actually support using
different PLs in tilepro, only tilegx.

Signed-off-by: Chris Metcalf

tile: implement gettimeofday() via vDSO

2013-08-13T20:26:21+00:00

This change creates the framework for vDSO calls, makes the existing
rt_sigreturn() mechanism use it, and adds a fast gettimeofday().
Now that we need to expose the vDSO address to userspace, we add
AT_SYSINFO_EHDR to the set of aux entries provided to userspace.
(You can disable any extra vDSO support by booting with vdso=0,
but the rt_sigreturn vDSO page will still be provided.)

Note that glibc has supported the tile vDSO since release 2.17.

Signed-off-by: Chris Metcalf

tilegx pci: support I/O to arbitrarily-cached pages

2012-07-18T20:40:05+00:00

The tilegx PCI root complex support (currently only in linux-next)
is limited to pages that are homed on cached in the default manner,
i.e. "hash-for-home".  This change supports delivery of I/O data to
pages that are cached in other ways (locally on a particular core,
uncached, user-managed incoherent, etc.).

A large part of the change is supporting flushing pages from cache
on particular homes so that we can transition the data that we are
delivering to or from the device appropriately.  The new homecache_finv*
routines handle this.

Some changes to page_table_range_init() were also required to make
the fixmap code work correctly on tilegx; it hadn't been used there
before.

We also remove some stub mark_caches_evicted_*() routines that
were just no-ops anyway.

Signed-off-by: Chris Metcalf