<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/arch/sh/kernel, branch v4.8</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'sh-for-4.8' of git://git.libc.org/linux-sh</title>
<updated>2016-08-06T13:00:05+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-08-06T13:00:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1630e843e104528ddf0208dfc692c70c9bd05a89'/>
<id>1630e843e104528ddf0208dfc692c70c9bd05a89</id>
<content type='text'>
Pull arch/sh updates from Rich Felker:
 "These changes improve device tree support (including builtin DTB), add
  support for the J-Core J2 processor, an open source synthesizable
  reimplementation of the SH-2 ISA, resolve a longstanding sigcontext
  ABI mismatch issue, and fix various bugs including nommu-specific
  issues and minor regressions introduced in 4.6.

  The J-Core arch support is included here but to be usable it needs
  drivers that are waiting on approval/inclusion from their subsystem
  maintainers"

* tag 'sh-for-4.8' of git://git.libc.org/linux-sh: (23 commits)
  sh: add device tree source for J2 FPGA on Mimas v2 board
  sh: add defconfig for J-Core J2
  sh: use common clock framework with device tree boards
  sh: system call wire up
  sh: Delete unnecessary checks before the function call "mempool_destroy"
  sh: do not perform IPI-based cache flush except on boards that need it
  sh: add SMP support for J2
  sh: SMP support for SH2 entry.S
  sh: add working futex atomic ops on userspace addresses for smp
  sh: add J2 atomics using the cas.l instruction
  sh: add AT_HWCAP flag for J-Core cas.l instruction
  sh: add support for J-Core J2 processor
  sh: fix build regression with CONFIG_OF &amp;&amp; !CONFIG_OF_FLATTREE
  sh: allow clocksource drivers to register sched_clock backends
  sh: make heartbeat driver explicitly non-modular
  sh: make board-secureedge5410 explicitly non-modular
  sh: make mm/asids-debugfs explicitly non-modular
  sh: make time.c explicitly non-modular
  sh: fix futex/robust_list on nommu models
  sh: disable aliased page logic on NOMMU models
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull arch/sh updates from Rich Felker:
 "These changes improve device tree support (including builtin DTB), add
  support for the J-Core J2 processor, an open source synthesizable
  reimplementation of the SH-2 ISA, resolve a longstanding sigcontext
  ABI mismatch issue, and fix various bugs including nommu-specific
  issues and minor regressions introduced in 4.6.

  The J-Core arch support is included here but to be usable it needs
  drivers that are waiting on approval/inclusion from their subsystem
  maintainers"

* tag 'sh-for-4.8' of git://git.libc.org/linux-sh: (23 commits)
  sh: add device tree source for J2 FPGA on Mimas v2 board
  sh: add defconfig for J-Core J2
  sh: use common clock framework with device tree boards
  sh: system call wire up
  sh: Delete unnecessary checks before the function call "mempool_destroy"
  sh: do not perform IPI-based cache flush except on boards that need it
  sh: add SMP support for J2
  sh: SMP support for SH2 entry.S
  sh: add working futex atomic ops on userspace addresses for smp
  sh: add J2 atomics using the cas.l instruction
  sh: add AT_HWCAP flag for J-Core cas.l instruction
  sh: add support for J-Core J2 processor
  sh: fix build regression with CONFIG_OF &amp;&amp; !CONFIG_OF_FLATTREE
  sh: allow clocksource drivers to register sched_clock backends
  sh: make heartbeat driver explicitly non-modular
  sh: make board-secureedge5410 explicitly non-modular
  sh: make mm/asids-debugfs explicitly non-modular
  sh: make time.c explicitly non-modular
  sh: fix futex/robust_list on nommu models
  sh: disable aliased page logic on NOMMU models
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'rtc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux</title>
<updated>2016-08-05T13:48:22+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-08-05T13:48:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6c84239d595dc6ffe39f0f03dae2f64ed200db95'/>
<id>6c84239d595dc6ffe39f0f03dae2f64ed200db95</id>
<content type='text'>
Pull RTC updates from Alexandre Belloni:
 "RTC for 4.8

  Cleanups:
   - huge cleanup of rtc-generic and char/genrtc this allowed to cleanup
     rtc-cmos, rtc-sh, rtc-m68k, rtc-powerpc and rtc-parisc
   - move mn10300 to rtc-cmos

  Subsystem:
   - fix wakealarms after hibernate
   - multiples fixes for rctest
   - simplify implementations of .read_alarm

  New drivers:
   - Maxim MAX6916

  Drivers:
   - ds1307: fix weekday
   - m41t80: add wakeup support
   - pcf85063: add support for PCF85063A variant
   - rv8803: extend i2c fix and other fixes
   - s35390a: fix alarm reading, this fixes instant reboot after
     shutdown for QNAP TS-41x
   - s3c: clock fixes"

* tag 'rtc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (65 commits)
  rtc: rv8803: Clear V1F when setting the time
  rtc: rv8803: Stop the clock while setting the time
  rtc: rv8803: Always apply the I²C workaround
  rtc: rv8803: Fix read day of week
  rtc: rv8803: Remove the check for valid time
  rtc: rv8803: Kconfig: Indicate rx8900 support
  rtc: asm9260: remove .owner field for driver
  rtc: at91sam9: Fix missing spin_lock_init()
  rtc: m41t80: add suspend handlers for alarm IRQ
  rtc: m41t80: make it a real error message
  rtc: pcf85063: Add support for the PCF85063A device
  rtc: pcf85063: fix year range
  rtc: hym8563: in .read_alarm set .tm_sec to 0 to signal minute accuracy
  rtc: explicitly set tm_sec = 0 for drivers with minute accurancy
  rtc: s3c: Add s3c_rtc_{enable/disable}_clk in s3c_rtc_setfreq()
  rtc: s3c: Remove unnecessary call to disable already disabled clock
  rtc: abx80x: use devm_add_action_or_reset()
  rtc: m41t80: use devm_add_action_or_reset()
  rtc: fix a typo and reduce three empty lines to one
  rtc: s35390a: improve two comments in .set_alarm
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull RTC updates from Alexandre Belloni:
 "RTC for 4.8

  Cleanups:
   - huge cleanup of rtc-generic and char/genrtc this allowed to cleanup
     rtc-cmos, rtc-sh, rtc-m68k, rtc-powerpc and rtc-parisc
   - move mn10300 to rtc-cmos

  Subsystem:
   - fix wakealarms after hibernate
   - multiples fixes for rctest
   - simplify implementations of .read_alarm

  New drivers:
   - Maxim MAX6916

  Drivers:
   - ds1307: fix weekday
   - m41t80: add wakeup support
   - pcf85063: add support for PCF85063A variant
   - rv8803: extend i2c fix and other fixes
   - s35390a: fix alarm reading, this fixes instant reboot after
     shutdown for QNAP TS-41x
   - s3c: clock fixes"

* tag 'rtc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (65 commits)
  rtc: rv8803: Clear V1F when setting the time
  rtc: rv8803: Stop the clock while setting the time
  rtc: rv8803: Always apply the I²C workaround
  rtc: rv8803: Fix read day of week
  rtc: rv8803: Remove the check for valid time
  rtc: rv8803: Kconfig: Indicate rx8900 support
  rtc: asm9260: remove .owner field for driver
  rtc: at91sam9: Fix missing spin_lock_init()
  rtc: m41t80: add suspend handlers for alarm IRQ
  rtc: m41t80: make it a real error message
  rtc: pcf85063: Add support for the PCF85063A device
  rtc: pcf85063: fix year range
  rtc: hym8563: in .read_alarm set .tm_sec to 0 to signal minute accuracy
  rtc: explicitly set tm_sec = 0 for drivers with minute accurancy
  rtc: s3c: Add s3c_rtc_{enable/disable}_clk in s3c_rtc_setfreq()
  rtc: s3c: Remove unnecessary call to disable already disabled clock
  rtc: abx80x: use devm_add_action_or_reset()
  rtc: m41t80: use devm_add_action_or_reset()
  rtc: fix a typo and reduce three empty lines to one
  rtc: s35390a: improve two comments in .set_alarm
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: use common clock framework with device tree boards</title>
<updated>2016-08-05T03:29:45+00:00</updated>
<author>
<name>Rich Felker</name>
<email>dalias@libc.org</email>
</author>
<published>2016-07-31T03:11:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=15f0c8f2f378a05fe7b25e545c353a6b5cf5126a'/>
<id>15f0c8f2f378a05fe7b25e545c353a6b5cf5126a</id>
<content type='text'>
Enable common clk framework for DT-based boards and disable code that
depends on the legacy sh clk framework when common clk is enabled.
Once legacy drivers are converted over, the old code can be removed
entirely.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable common clk framework for DT-based boards and disable code that
depends on the legacy sh clk framework when common clk is enabled.
Once legacy drivers are converted over, the old code can be removed
entirely.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: system call wire up</title>
<updated>2016-08-05T03:29:44+00:00</updated>
<author>
<name>Yoshinori Sato</name>
<email>ysato@users.sourceforge.jp</email>
</author>
<published>2016-06-28T06:49:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=74bdaa611fa69368fb4032ad437af073d31116bd'/>
<id>74bdaa611fa69368fb4032ad437af073d31116bd</id>
<content type='text'>
Signed-off-by: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Delete unnecessary checks before the function call "mempool_destroy"</title>
<updated>2016-08-05T03:29:42+00:00</updated>
<author>
<name>Markus Elfring</name>
<email>elfring@users.sourceforge.net</email>
</author>
<published>2015-11-16T07:20:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a316399635e334c878a88c90044c1e45f57129a4'/>
<id>a316399635e334c878a88c90044c1e45f57129a4</id>
<content type='text'>
The mempool_destroy() function tests whether its argument is NULL
and then returns immediately. Thus the test around the calls is not needed.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring &lt;elfring@users.sourceforge.net&gt;
Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The mempool_destroy() function tests whether its argument is NULL
and then returns immediately. Thus the test around the calls is not needed.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring &lt;elfring@users.sourceforge.net&gt;
Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: add SMP support for J2</title>
<updated>2016-08-05T03:29:39+00:00</updated>
<author>
<name>Rich Felker</name>
<email>dalias@libc.org</email>
</author>
<published>2016-02-15T18:36:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b4214e41b7152b1964a3421a40251d202ae2d2c0'/>
<id>b4214e41b7152b1964a3421a40251d202ae2d2c0</id>
<content type='text'>
Support is hooked up via a cpu start method specified in the device
tree, and also depends on DT nodes that describe the interfaces for
performing IPI and identifying which cpu execution is taking place on.
The currently used method is a form of spin table, where secondary
cpus are unblocked by writing to a special address.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Support is hooked up via a cpu start method specified in the device
tree, and also depends on DT nodes that describe the interfaces for
performing IPI and identifying which cpu execution is taking place on.
The currently used method is a form of spin table, where secondary
cpus are unblocked by writing to a special address.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: SMP support for SH2 entry.S</title>
<updated>2016-08-05T03:29:37+00:00</updated>
<author>
<name>Rich Felker</name>
<email>dalias@libc.org</email>
</author>
<published>2016-02-15T18:32:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4b6ef05b3e89f5bdb888fbd5467e996a9193b884'/>
<id>4b6ef05b3e89f5bdb888fbd5467e996a9193b884</id>
<content type='text'>
The SH2 version of entry.S uses global variables, which need to be
cpu-local in order to work with SMP. For ease of access from asm,
simply use arrays indexed by cpu number, and require the availability
of an address (mmio register or properly setup per-cpu memory) from
which the current cpu's index can be read.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SH2 version of entry.S uses global variables, which need to be
cpu-local in order to work with SMP. For ease of access from asm,
simply use arrays indexed by cpu number, and require the availability
of an address (mmio register or properly setup per-cpu memory) from
which the current cpu's index can be read.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: add AT_HWCAP flag for J-Core cas.l instruction</title>
<updated>2016-08-05T03:29:32+00:00</updated>
<author>
<name>Rich Felker</name>
<email>dalias@libc.org</email>
</author>
<published>2016-04-22T23:29:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=834da197058bebcb343320dafb8b62d416d4038c'/>
<id>834da197058bebcb343320dafb8b62d416d4038c</id>
<content type='text'>
The J-Core cpu has, as an ISA extension, an atomic compare-and-swap
instruction cas.l which applications need to use (instead the imask or
gusa atomic models, which are fundamentally limited to UP) for
synchronization in order to be compatible with SMP systems. Provide a
hwcap flag so that it's possible to do runtime selection and support
both.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The J-Core cpu has, as an ISA extension, an atomic compare-and-swap
instruction cas.l which applications need to use (instead the imask or
gusa atomic models, which are fundamentally limited to UP) for
synchronization in order to be compatible with SMP systems. Provide a
hwcap flag so that it's possible to do runtime selection and support
both.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: add support for J-Core J2 processor</title>
<updated>2016-08-05T03:29:31+00:00</updated>
<author>
<name>Rich Felker</name>
<email>dalias@libc.org</email>
</author>
<published>2016-03-17T23:09:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=5a846abad07f6f30adfa3e46c5c7a47d2e7b1e63'/>
<id>5a846abad07f6f30adfa3e46c5c7a47d2e7b1e63</id>
<content type='text'>
At the CPU/ISA level, the J2 is compatible with SH-2, and thus the
changes to add J2 support build on existing SH-2 support. However, J2
does not duplicate the memory-mapped SH-2 features like the cache
interface. Instead, the cache interfaces is described in the device
tree, and new code is added to be able to access the flat device tree
at early boot before it is unflattened.

Support is also added for receiving interrupts on trap numbers in the
range 16 to 31, since the J-Core aic1 interrupt controller generates
these traps. This range was unused but nominally for hardware
exceptions on SH-2, and a few values in this range were used for
exceptions on SH-2A, but SH-2A has its own version of the relevant
code.

No individual cpu subtypes are added for J2 since the intent moving
forward is to represent SoCs with device tree rather than as
hard-coded subtypes in the kernel. The CPU_SUBTYPE_J2 Kconfig item
exists only to fit into the existing cpu selection mechanism until it
is overhauled.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At the CPU/ISA level, the J2 is compatible with SH-2, and thus the
changes to add J2 support build on existing SH-2 support. However, J2
does not duplicate the memory-mapped SH-2 features like the cache
interface. Instead, the cache interfaces is described in the device
tree, and new code is added to be able to access the flat device tree
at early boot before it is unflattened.

Support is also added for receiving interrupts on trap numbers in the
range 16 to 31, since the J-Core aic1 interrupt controller generates
these traps. This range was unused but nominally for hardware
exceptions on SH-2, and a few values in this range were used for
exceptions on SH-2A, but SH-2A has its own version of the relevant
code.

No individual cpu subtypes are added for J2 since the intent moving
forward is to represent SoCs with device tree rather than as
hard-coded subtypes in the kernel. The CPU_SUBTYPE_J2 Kconfig item
exists only to fit into the existing cpu selection mechanism until it
is overhauled.

Signed-off-by: Rich Felker &lt;dalias@libc.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dma-mapping: use unsigned long for dma_attrs</title>
<updated>2016-08-04T12:50:07+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>k.kozlowski@samsung.com</email>
</author>
<published>2016-08-03T20:46:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=00085f1efa387a8ce100e3734920f7639c80caa3'/>
<id>00085f1efa387a8ce100e3734920f7639c80caa3</id>
<content type='text'>
The dma-mapping core and the implementations do not change the DMA
attributes passed by pointer.  Thus the pointer can point to const data.
However the attributes do not have to be a bitfield.  Instead unsigned
long will do fine:

1. This is just simpler.  Both in terms of reading the code and setting
   attributes.  Instead of initializing local attributes on the stack
   and passing pointer to it to dma_set_attr(), just set the bits.

2. It brings safeness and checking for const correctness because the
   attributes are passed by value.

Semantic patches for this change (at least most of them):

    virtual patch
    virtual context

    @r@
    identifier f, attrs;

    @@
    f(...,
    - struct dma_attrs *attrs
    + unsigned long attrs
    , ...)
    {
    ...
    }

    @@
    identifier r.f;
    @@
    f(...,
    - NULL
    + 0
     )

and

    // Options: --all-includes
    virtual patch
    virtual context

    @r@
    identifier f, attrs;
    type t;

    @@
    t f(..., struct dma_attrs *attrs);

    @@
    identifier r.f;
    @@
    f(...,
    - NULL
    + 0
     )

Link: http://lkml.kernel.org/r/1468399300-5399-2-git-send-email-k.kozlowski@samsung.com
Signed-off-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Acked-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Acked-by: Hans-Christian Noren Egtvedt &lt;egtvedt@samfundet.no&gt;
Acked-by: Mark Salter &lt;msalter@redhat.com&gt; [c6x]
Acked-by: Jesper Nilsson &lt;jesper.nilsson@axis.com&gt; [cris]
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt; [drm]
Reviewed-by: Bart Van Assche &lt;bart.vanassche@sandisk.com&gt;
Acked-by: Joerg Roedel &lt;jroedel@suse.de&gt; [iommu]
Acked-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt; [bdisp]
Reviewed-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt; [vb2-core]
Acked-by: David Vrabel &lt;david.vrabel@citrix.com&gt; [xen]
Acked-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt; [xen swiotlb]
Acked-by: Joerg Roedel &lt;jroedel@suse.de&gt; [iommu]
Acked-by: Richard Kuo &lt;rkuo@codeaurora.org&gt; [hexagon]
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt; [m68k]
Acked-by: Gerald Schaefer &lt;gerald.schaefer@de.ibm.com&gt; [s390]
Acked-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Acked-by: Hans-Christian Noren Egtvedt &lt;egtvedt@samfundet.no&gt; [avr32]
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt; [arc]
Acked-by: Robin Murphy &lt;robin.murphy@arm.com&gt; [arm64 and dma-iommu]
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The dma-mapping core and the implementations do not change the DMA
attributes passed by pointer.  Thus the pointer can point to const data.
However the attributes do not have to be a bitfield.  Instead unsigned
long will do fine:

1. This is just simpler.  Both in terms of reading the code and setting
   attributes.  Instead of initializing local attributes on the stack
   and passing pointer to it to dma_set_attr(), just set the bits.

2. It brings safeness and checking for const correctness because the
   attributes are passed by value.

Semantic patches for this change (at least most of them):

    virtual patch
    virtual context

    @r@
    identifier f, attrs;

    @@
    f(...,
    - struct dma_attrs *attrs
    + unsigned long attrs
    , ...)
    {
    ...
    }

    @@
    identifier r.f;
    @@
    f(...,
    - NULL
    + 0
     )

and

    // Options: --all-includes
    virtual patch
    virtual context

    @r@
    identifier f, attrs;
    type t;

    @@
    t f(..., struct dma_attrs *attrs);

    @@
    identifier r.f;
    @@
    f(...,
    - NULL
    + 0
     )

Link: http://lkml.kernel.org/r/1468399300-5399-2-git-send-email-k.kozlowski@samsung.com
Signed-off-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Acked-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Acked-by: Hans-Christian Noren Egtvedt &lt;egtvedt@samfundet.no&gt;
Acked-by: Mark Salter &lt;msalter@redhat.com&gt; [c6x]
Acked-by: Jesper Nilsson &lt;jesper.nilsson@axis.com&gt; [cris]
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt; [drm]
Reviewed-by: Bart Van Assche &lt;bart.vanassche@sandisk.com&gt;
Acked-by: Joerg Roedel &lt;jroedel@suse.de&gt; [iommu]
Acked-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt; [bdisp]
Reviewed-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt; [vb2-core]
Acked-by: David Vrabel &lt;david.vrabel@citrix.com&gt; [xen]
Acked-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt; [xen swiotlb]
Acked-by: Joerg Roedel &lt;jroedel@suse.de&gt; [iommu]
Acked-by: Richard Kuo &lt;rkuo@codeaurora.org&gt; [hexagon]
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt; [m68k]
Acked-by: Gerald Schaefer &lt;gerald.schaefer@de.ibm.com&gt; [s390]
Acked-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Acked-by: Hans-Christian Noren Egtvedt &lt;egtvedt@samfundet.no&gt; [avr32]
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt; [arc]
Acked-by: Robin Murphy &lt;robin.murphy@arm.com&gt; [arm64 and dma-iommu]
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
