<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/arch/powerpc/sysdev/xive/native.c, branch v5.13.2</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>powerpc/xive: Use the "ibm, chip-id" property only under PowerNV</title>
<updated>2021-04-17T00:40:51+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-04-13T13:03:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e9e16917bc388846163b8566a298a291d71e44c9'/>
<id>e9e16917bc388846163b8566a298a291d71e44c9</id>
<content type='text'>
The 'chip_id' field of the XIVE CPU structure is used to choose a
target for a source located on the same chip. For that, the XIVE
driver queries the chip identifier from the "ibm,chip-id" property
and compares it to a 'src_chip' field identifying the chip of a
source. This information is only available on the PowerNV platform,
'src_chip' being assigned to XIVE_INVALID_CHIP_ID under pSeries.

The "ibm,chip-id" property is also not available on all platforms. It
was first introduced on PowerNV and later, under QEMU for pSeries/KVM.
However, the property is not part of PAPR and does not exist under
pSeries/PowerVM.

Assign 'chip_id' to XIVE_INVALID_CHIP_ID by default and let the
PowerNV platform override the value with the "ibm,chip-id" property.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210413130352.1183267-1-clg@kaod.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The 'chip_id' field of the XIVE CPU structure is used to choose a
target for a source located on the same chip. For that, the XIVE
driver queries the chip identifier from the "ibm,chip-id" property
and compares it to a 'src_chip' field identifying the chip of a
source. This information is only available on the PowerNV platform,
'src_chip' being assigned to XIVE_INVALID_CHIP_ID under pSeries.

The "ibm,chip-id" property is also not available on all platforms. It
was first introduced on PowerNV and later, under QEMU for pSeries/KVM.
However, the property is not part of PAPR and does not exist under
pSeries/PowerVM.

Assign 'chip_id' to XIVE_INVALID_CHIP_ID by default and let the
PowerNV platform override the value with the "ibm,chip-id" property.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210413130352.1183267-1-clg@kaod.org
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Improve error reporting of OPAL calls</title>
<updated>2020-12-10T22:53:11+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2020-12-10T17:14:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=07efbca11c1a985efa4d15bd76a637c6bffc253b'/>
<id>07efbca11c1a985efa4d15bd76a637c6bffc253b</id>
<content type='text'>
Introduce a vp_err() macro to standardize error reporting.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Greg Kurz &lt;groug@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-13-clg@kaod.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce a vp_err() macro to standardize error reporting.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Greg Kurz &lt;groug@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-13-clg@kaod.org
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_EOI_FW</title>
<updated>2020-12-10T22:53:10+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2020-12-10T17:14:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=cf58b746665d0177b86d42d18e60985fa1fdb909'/>
<id>cf58b746665d0177b86d42d18e60985fa1fdb909</id>
<content type='text'>
This flag was used to support the P9 DD1 and we have stopped
supporting this CPU when DD2 came out. See skiboot commit:

  https://github.com/open-power/skiboot/commit/0b0d15e3c170

Also, remove eoi handler which is now unused.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Greg Kurz &lt;groug@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-11-clg@kaod.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This flag was used to support the P9 DD1 and we have stopped
supporting this CPU when DD2 came out. See skiboot commit:

  https://github.com/open-power/skiboot/commit/0b0d15e3c170

Also, remove eoi handler which is now unused.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Greg Kurz &lt;groug@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-11-clg@kaod.org
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_MASK_FW</title>
<updated>2020-12-10T22:53:10+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2020-12-10T17:14:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b5277d18c65e31ce51f6733ebdca3985a962fab5'/>
<id>b5277d18c65e31ce51f6733ebdca3985a962fab5</id>
<content type='text'>
This flag was used to support the PHB4 LSIs on P9 DD1 and we have
stopped supporting this CPU when DD2 came out. See skiboot commit:

  https://github.com/open-power/skiboot/commit/0b0d15e3c170

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Greg Kurz &lt;groug@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-10-clg@kaod.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This flag was used to support the PHB4 LSIs on P9 DD1 and we have
stopped supporting this CPU when DD2 came out. See skiboot commit:

  https://github.com/open-power/skiboot/commit/0b0d15e3c170

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Greg Kurz &lt;groug@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-10-clg@kaod.org
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_SHIFT_BUG</title>
<updated>2020-12-10T22:53:10+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2020-12-10T17:14:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4cc0e36df2c0a41fd38645ddde08d2bfba699b7a'/>
<id>4cc0e36df2c0a41fd38645ddde08d2bfba699b7a</id>
<content type='text'>
This flag was used to support the PHB4 LSIs on P9 DD1 and we have
stopped supporting this CPU when DD2 came out. See skiboot commit:

  https://github.com/open-power/skiboot/commit/0b0d15e3c170

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Greg Kurz &lt;groug@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-9-clg@kaod.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This flag was used to support the PHB4 LSIs on P9 DD1 and we have
stopped supporting this CPU when DD2 came out. See skiboot commit:

  https://github.com/open-power/skiboot/commit/0b0d15e3c170

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Greg Kurz &lt;groug@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-9-clg@kaod.org
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Add a name to the IRQ domain</title>
<updated>2020-12-10T22:53:09+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2020-12-10T17:14:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9dfe4b14df93532da3dbf11952a17389ae3cdc67'/>
<id>9dfe4b14df93532da3dbf11952a17389ae3cdc67</id>
<content type='text'>
We hope one day to handle multiple irq_domain in the XIVE driver.
Start simple by setting the name using the DT node.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-6-clg@kaod.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We hope one day to handle multiple irq_domain in the XIVE driver.
Start simple by setting the name using the DT node.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201210171450.1933725-6-clg@kaod.org
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Ignore kmemleak false positives</title>
<updated>2020-06-22T00:37:57+00:00</updated>
<author>
<name>Alexey Kardashevskiy</name>
<email>aik@ozlabs.ru</email>
</author>
<published>2020-06-12T04:33:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f0993c839e95dd6c7f054a1015e693c87e33e4fb'/>
<id>f0993c839e95dd6c7f054a1015e693c87e33e4fb</id>
<content type='text'>
xive_native_provision_pages() allocates memory and passes the pointer to
OPAL so kmemleak cannot find the pointer usage in the kernel memory and
produces a false positive report (below) (even if the kernel did scan
OPAL memory, it is unable to deal with __pa() addresses anyway).

This silences the warning.

unreferenced object 0xc000200350c40000 (size 65536):
  comm "qemu-system-ppc", pid 2725, jiffies 4294946414 (age 70776.530s)
  hex dump (first 32 bytes):
    02 00 00 00 50 00 00 00 00 00 00 00 00 00 00 00  ....P...........
    01 00 08 07 00 00 00 00 00 00 00 00 00 00 00 00  ................
  backtrace:
    [&lt;0000000081ff046c&gt;] xive_native_alloc_vp_block+0x120/0x250
    [&lt;00000000d555d524&gt;] kvmppc_xive_compute_vp_id+0x248/0x350 [kvm]
    [&lt;00000000d69b9c9f&gt;] kvmppc_xive_connect_vcpu+0xc0/0x520 [kvm]
    [&lt;000000006acbc81c&gt;] kvm_arch_vcpu_ioctl+0x308/0x580 [kvm]
    [&lt;0000000089c69580&gt;] kvm_vcpu_ioctl+0x19c/0xae0 [kvm]
    [&lt;00000000902ae91e&gt;] ksys_ioctl+0x184/0x1b0
    [&lt;00000000f3e68bd7&gt;] sys_ioctl+0x48/0xb0
    [&lt;0000000001b2c127&gt;] system_call_exception+0x124/0x1f0
    [&lt;00000000d2b2ee40&gt;] system_call_common+0xe8/0x214

Signed-off-by: Alexey Kardashevskiy &lt;aik@ozlabs.ru&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200612043303.84894-1-aik@ozlabs.ru
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
xive_native_provision_pages() allocates memory and passes the pointer to
OPAL so kmemleak cannot find the pointer usage in the kernel memory and
produces a false positive report (below) (even if the kernel did scan
OPAL memory, it is unable to deal with __pa() addresses anyway).

This silences the warning.

unreferenced object 0xc000200350c40000 (size 65536):
  comm "qemu-system-ppc", pid 2725, jiffies 4294946414 (age 70776.530s)
  hex dump (first 32 bytes):
    02 00 00 00 50 00 00 00 00 00 00 00 00 00 00 00  ....P...........
    01 00 08 07 00 00 00 00 00 00 00 00 00 00 00 00  ................
  backtrace:
    [&lt;0000000081ff046c&gt;] xive_native_alloc_vp_block+0x120/0x250
    [&lt;00000000d555d524&gt;] kvmppc_xive_compute_vp_id+0x248/0x350 [kvm]
    [&lt;00000000d69b9c9f&gt;] kvmppc_xive_connect_vcpu+0xc0/0x520 [kvm]
    [&lt;000000006acbc81c&gt;] kvm_arch_vcpu_ioctl+0x308/0x580 [kvm]
    [&lt;0000000089c69580&gt;] kvm_vcpu_ioctl+0x19c/0xae0 [kvm]
    [&lt;00000000902ae91e&gt;] ksys_ioctl+0x184/0x1b0
    [&lt;00000000f3e68bd7&gt;] sys_ioctl+0x48/0xb0
    [&lt;0000000001b2c127&gt;] system_call_exception+0x124/0x1f0
    [&lt;00000000d2b2ee40&gt;] system_call_common+0xe8/0x214

Signed-off-by: Alexey Kardashevskiy &lt;aik@ozlabs.ru&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200612043303.84894-1-aik@ozlabs.ru
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Define xive_native_alloc_irq_on_chip()</title>
<updated>2020-04-20T06:52:59+00:00</updated>
<author>
<name>Haren Myneni</name>
<email>haren@linux.ibm.com</email>
</author>
<published>2020-04-16T05:58:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8d0ea29db5aefd0d94fa4b6ca6124c68998f3c6a'/>
<id>8d0ea29db5aefd0d94fa4b6ca6124c68998f3c6a</id>
<content type='text'>
This function allocates IRQ on a specific chip. VAS needs per chip
IRQ allocation and will have IRQ handler per VAS instance.

Signed-off-by: Haren Myneni &lt;haren@linux.ibm.com&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/1587016720.2275.1047.camel@hbabu-laptop
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This function allocates IRQ on a specific chip. VAS needs per chip
IRQ allocation and will have IRQ handler per VAS instance.

Signed-off-by: Haren Myneni &lt;haren@linux.ibm.com&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/1587016720.2275.1047.camel@hbabu-laptop
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Add a debugfs file to dump internal XIVE state</title>
<updated>2020-03-26T13:20:38+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2020-03-06T15:01:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=930914b7d528fc6b0249bffc00564100bcf6ef75'/>
<id>930914b7d528fc6b0249bffc00564100bcf6ef75</id>
<content type='text'>
As does XMON, the debugfs file /sys/kernel/debug/powerpc/xive exposes
the XIVE internal state of the machine CPUs and interrupts. Available
on the PowerNV and sPAPR platforms.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
[mpe: Make the debugfs file 0400]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200306150143.5551-5-clg@kaod.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As does XMON, the debugfs file /sys/kernel/debug/powerpc/xive exposes
the XIVE internal state of the machine CPUs and interrupts. Available
on the PowerNV and sPAPR platforms.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
[mpe: Make the debugfs file 0400]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200306150143.5551-5-clg@kaod.org
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/xive: Use XIVE_BAD_IRQ instead of zero to catch non configured IPIs</title>
<updated>2020-03-26T13:19:04+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2020-03-06T15:01:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b1a504a6500df50e83b701b7946b34fce27ad8a3'/>
<id>b1a504a6500df50e83b701b7946b34fce27ad8a3</id>
<content type='text'>
When a CPU is brought up, an IPI number is allocated and recorded
under the XIVE CPU structure. Invalid IPI numbers are tracked with
interrupt number 0x0.

On the PowerNV platform, the interrupt number space starts at 0x10 and
this works fine. However, on the sPAPR platform, it is possible to
allocate the interrupt number 0x0 and this raises an issue when CPU 0
is unplugged. The XIVE spapr driver tracks allocated interrupt numbers
in a bitmask and it is not correctly updated when interrupt number 0x0
is freed. It stays allocated and it is then impossible to reallocate.

Fix by using the XIVE_BAD_IRQ value instead of zero on both platforms.

Reported-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Fixes: eac1e731b59e ("powerpc/xive: guest exploitation of the XIVE interrupt controller")
Cc: stable@vger.kernel.org # v4.14+
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Tested-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200306150143.5551-2-clg@kaod.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When a CPU is brought up, an IPI number is allocated and recorded
under the XIVE CPU structure. Invalid IPI numbers are tracked with
interrupt number 0x0.

On the PowerNV platform, the interrupt number space starts at 0x10 and
this works fine. However, on the sPAPR platform, it is possible to
allocate the interrupt number 0x0 and this raises an issue when CPU 0
is unplugged. The XIVE spapr driver tracks allocated interrupt numbers
in a bitmask and it is not correctly updated when interrupt number 0x0
is freed. It stays allocated and it is then impossible to reallocate.

Fix by using the XIVE_BAD_IRQ value instead of zero on both platforms.

Reported-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Fixes: eac1e731b59e ("powerpc/xive: guest exploitation of the XIVE interrupt controller")
Cc: stable@vger.kernel.org # v4.14+
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Tested-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200306150143.5551-2-clg@kaod.org
</pre>
</div>
</content>
</entry>
</feed>
