<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/arch/powerpc/kernel/cputable.c, branch v3.3</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>powerpc/476fpe: Add 476fpe SoC code</title>
<updated>2011-12-09T12:51:02+00:00</updated>
<author>
<name>Tony Breeds</name>
<email>tony@bakeyournoodle.com</email>
</author>
<published>2011-11-30T21:39:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=df777bd39a266637d1765d48043493489418e75b'/>
<id>df777bd39a266637d1765d48043493489418e75b</id>
<content type='text'>
Based on original work by David 'Shaggy' Kleikamp.

Signed-off-by: Tony Breeds &lt;tony@bakeyournoodle.com&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Based on original work by David 'Shaggy' Kleikamp.

Signed-off-by: Tony Breeds &lt;tony@bakeyournoodle.com&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/40x: Add APM8018X SOC support</title>
<updated>2011-11-30T15:02:15+00:00</updated>
<author>
<name>Tanmay Inamdar</name>
<email>tinamdar@apm.com</email>
</author>
<published>2011-11-28T21:01:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d5b9ee7b514ee2f3df649fe38d01494ad7a8b956'/>
<id>d5b9ee7b514ee2f3df649fe38d01494ad7a8b956</id>
<content type='text'>
The AppliedMicro APM8018X embedded processor targets embedded applications that
require low power and a small footprint. It features a PowerPC 405 processor
core built in a 65nm low-power CMOS process with a five-stage pipeline executing
up to one instruction per cycle. The family has 128-kbytes of on-chip memory,
a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface.

Signed-off-by: Tanmay Inamdar &lt;tinamdar@apm.com&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The AppliedMicro APM8018X embedded processor targets embedded applications that
require low power and a small footprint. It features a PowerPC 405 processor
core built in a 65nm low-power CMOS process with a five-stage pipeline executing
up to one instruction per cycle. The family has 128-kbytes of on-chip memory,
a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface.

Signed-off-by: Tanmay Inamdar &lt;tinamdar@apm.com&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: various straight conversions from module.h --&gt; export.h</title>
<updated>2011-10-31T23:30:44+00:00</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2011-07-22T22:24:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4b16f8e2d6d64249f0ed3ca7fe2a319d0dde2719'/>
<id>4b16f8e2d6d64249f0ed3ca7fe2a319d0dde2719</id>
<content type='text'>
All these files were including module.h just for the basic
EXPORT_SYMBOL infrastructure.  We can shift them off to the
export.h header which is a way smaller footprint and thus
realize some compile time gains.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All these files were including module.h just for the basic
EXPORT_SYMBOL infrastructure.  We can shift them off to the
export.h header which is a way smaller footprint and thus
realize some compile time gains.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Return the_cpu_ spec from identify_cpu</title>
<updated>2011-08-05T04:47:54+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2011-07-25T11:04:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=26ee97672eaee9725bd7d66c3964579c4af7037d'/>
<id>26ee97672eaee9725bd7d66c3964579c4af7037d</id>
<content type='text'>
Commit af9eef3c7b1ed004c378c89b87642f4937337d50 caused cpu_setup to see
the_cpu_spec, rather than the source struct.  However, on 32-bit, the
return value of identify_cpu was being used for feature fixups, and
identify_cpu was returning the source struct.  So if cpu_setup patches
the feature bits, the update won't affect the fixups.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit af9eef3c7b1ed004c378c89b87642f4937337d50 caused cpu_setup to see
the_cpu_spec, rather than the source struct.  However, on 32-bit, the
return value of identify_cpu was being used for feature fixups, and
identify_cpu was returning the source struct.  So if cpu_setup patches
the feature bits, the update won't affect the fixups.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/book3e: Fix CPU feature handling on e5500 in 32-bit mode</title>
<updated>2011-06-02T20:29:09+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2011-06-02T16:26:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=fb9be2349f099d7c68b706e04fd62c478d3c0ed2'/>
<id>fb9be2349f099d7c68b706e04fd62c478d3c0ed2</id>
<content type='text'>
We are missing FPU feature bit that user space may require.  In the
64-bit mode this gets set since we pull it in via COMMON_USER_PPC64.  We
just explicitly set it so user space will be happy again.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We are missing FPU feature bit that user space may require.  In the
64-bit mode this gets set since we pull it in via COMMON_USER_PPC64.  We
just explicitly set it so user space will be happy again.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Free up some CPU feature bits by moving out MMU-related features</title>
<updated>2011-04-27T04:18:52+00:00</updated>
<author>
<name>Matt Evans</name>
<email>matt@ozlabs.org</email>
</author>
<published>2011-04-06T19:48:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=44ae3ab3358e962039c36ad4ae461ae9fb29596c'/>
<id>44ae3ab3358e962039c36ad4ae461ae9fb29596c</id>
<content type='text'>
Some of the 64bit PPC CPU features are MMU-related, so this patch moves
them to MMU_FTR_ bits.  All cpu_has_feature()-style tests are moved to
mmu_has_feature(), and seven feature bits are freed as a result.

Signed-off-by: Matt Evans &lt;matt@ozlabs.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some of the 64bit PPC CPU features are MMU-related, so this patch moves
them to MMU_FTR_ bits.  All cpu_has_feature()-style tests are moved to
mmu_has_feature(), and seven feature bits are freed as a result.

Signed-off-by: Matt Evans &lt;matt@ozlabs.org&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Add A2 cpu support</title>
<updated>2011-04-27T03:02:02+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2011-04-14T22:32:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=76b4eda866c4936af8d696f040abea56bf688e16'/>
<id>76b4eda866c4936af8d696f040abea56bf688e16</id>
<content type='text'>
Add the cputable entry, regs and setup &amp; restore entries for
the PowerPC A2 core.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the cputable entry, regs and setup &amp; restore entries for
the PowerPC A2 core.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Define CPU feature for Architected 2.06 HV mode</title>
<updated>2011-04-20T01:03:22+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2011-01-20T07:50:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=24cc67de62eebbda3ce0c46bdd56582c00dccd03'/>
<id>24cc67de62eebbda3ce0c46bdd56582c00dccd03</id>
<content type='text'>
This bit indicates that we are operating in hypervisor mode on a CPU
compliant to architecture 2.06 or later (currently server only).

We set it on POWER7 and have a boot-time CPU setup function that
clears it if MSR:HV isn't set (booting under a hypervisor).

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This bit indicates that we are operating in hypervisor mode on a CPU
compliant to architecture 2.06 or later (currently server only).

We set it on POWER7 and have a boot-time CPU setup function that
clears it if MSR:HV isn't set (booting under a hypervisor).

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/book3e: Fix CPU feature handling on 64-bit e5500</title>
<updated>2011-04-12T11:29:21+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2011-04-06T05:11:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=11ed0db9f6c7811233632d2ab79c50c011b89902'/>
<id>11ed0db9f6c7811233632d2ab79c50c011b89902</id>
<content type='text'>
The CPU_FTRS_POSSIBLE and CPU_FTRS_ALWAYS defines did not encompass
e5500 CPU features when built for 64-bit.  This causes issues with
cpu_has_feature() as it utilizes the POSSIBLE &amp; ALWAYS defines as part
of its check.

Create a unique CPU_FTRS_E5500 (as its different from CPU_FTRS_E500MC),
created a new group for 64-bit Book3e based CPUs and add CPU_FTRS_E5500
to that group.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The CPU_FTRS_POSSIBLE and CPU_FTRS_ALWAYS defines did not encompass
e5500 CPU features when built for 64-bit.  This causes issues with
cpu_has_feature() as it utilizes the POSSIBLE &amp; ALWAYS defines as part
of its check.

Create a unique CPU_FTRS_E5500 (as its different from CPU_FTRS_E500MC),
created a new group for 64-bit Book3e based CPUs and add CPU_FTRS_E5500
to that group.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge remote branch 'jwb/next' into next</title>
<updated>2011-03-17T06:59:01+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2011-03-17T06:59:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=831532035b12a5f7b600515a6f4da0b207b82d6e'/>
<id>831532035b12a5f7b600515a6f4da0b207b82d6e</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
</feed>
